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DBLP keys2004
4no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAmaury Nève, Helmut Schettler, Thomas Ludwig, Denis Flandre: Power-delay product minimization in high-performance 64-bit carry-select adders. IEEE Trans. VLSI Syst. 12(3): 235-244 (2004)
2002
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAmaury Nève, Denis Flandre, Helmut Schettler, Thomas Ludwig, Gerhard Hellner: Design of a branch-based 64-bit carry-select adder in 0.18 µm partially depleted SOI CMOS. ISLPED 2002: 108-111
1998
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJürgen Koehl, Ulrich Baur, Thomas Ludwig, Bernhard Kick, Thomas Pflueger: A Flat, Timing-Driven Design System for a High-Performance CMOS Processor Chipset. DATE 1998: 312-320
1997
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLBernhard Kick, Ulrich Baur, Jürgen Koehl, Thomas Ludwig, Thomas Pflueger: Standard-cell-based design methodology for high-performance support chips. IBM Journal of Research and Development 41(4&5): 505-514 (1997)

Coauthor Index

1Ulrich Baur [1] [2]
2Denis Flandre [3] [4]
3Gerhard Hellner [3]
4Bernhard Kick [1] [2]
5Jürgen Koehl [1] [2]
6Amaury Nève [3] [4]
7Thomas Pflueger [1] [2]
8Helmut Schettler [3] [4]

Colors in the list of coauthors

Copyright © Fri Mar 12 12:56:28 2010 by Michael Ley (ley@uni-trier.de)