Boyd Mathews Coauthor index DBLP Vis pubzone.org

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DBLP keys1994
5no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAbhaya Asthana, Mike Laznovsky, Boyd Mathews: SEMU: A Parallel Processing System for Timing Simulation of Digital CMOS VLSI Circuits. VLSI Design 1994: 33-38
1989
4no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAbhaya Asthana, H. V. Jagadish, Boyd Mathews: Impact of Advanced VLSI Packaging on the Design of a Large Parallel Computer. ICPP (1) 1989: 323-327
3no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAbhaya Asthana, Cheryl J. Briggs, Mark R. Cravats, Boyd Mathews: The Architecture of Massively Parallel Numeric Processor. IFIP Congress 1989: 891-891
1988
2no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAbhaya Asthana, Boyd Mathews, Cheryl J. Briggs, Mark R. Cravats: A VLSI Building Block for Massively Parallel Computation. FGCS 1988: 879-886
1986
1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLK. Ryan, J. A. Redmond, Donald O'Neill, Boyd Mathews, A. Hunot, Michel Lemoine, Manfred Dausmann, K. Wachsmuth: Surveying Software Tools for a Method Driven Environment. IFIP Congress 1986: 895-902

Coauthor Index

1Abhaya Asthana [2] [3] [4] [5]
2Cheryl J. Briggs [2] [3]
3Mark R. Cravats [2] [3]
4Manfred Dausmann [1]
5A. Hunot [1]
6H. V. Jagadish [4]
7Mike Laznovsky [5]
8Michel Lemoine [1]
9Donald O'Neill [1]
10J. A. Redmond [1]
11K. Ryan [1]
12K. Wachsmuth [1]

Colors in the list of coauthors

Copyright © Fri Mar 12 12:56:28 2010 by Michael Ley (ley@uni-trier.de)