 | 2007 |
|---|
| 7 |       | P. Embury,
A. Rao:
A Path to Hadamard Matrices.
AAECC 2007: 281-290 |
| 6 | | N. Pinnawala,
A. Rao,
T. Aaron Gulliver:
Distribution of Trace Values and Two-Weight, Self-orthogonal Codes over GF ( p , 2).
AAECC 2007: 311-320 |
| 2005 |
|---|
| 5 | | A. Rao,
Th. Haniotakis,
Y. Tsiatouhas,
H. Djemil:
The Use of Pre-Evaluation Phase in Dynamic CMOS Logic.
ISVLSI 2005: 270-271 |
| 2004 |
|---|
| 4 | | A. Rao,
Th. Haniotakis,
Y. Tsiatouhas,
V. Kaky:
A New Dynamic Circuit Design Technique for High Performance TSC Checker Implementations.
IOLTS 2004: 52-57 |
| 3 |  | N. Pinnawala,
A. Rao:
Cocyclic Simplex Codes of Type alpha Over mmb Z4 and mmb Z2s.
IEEE Transactions on Information Theory 50(9): 2165-2169 (2004) |
| 2002 |
|---|
| 2 | | A. Rao,
W. McIntyre,
J. Parry,
Un-Ku Moon,
Gabor C. Temes:
Buck-boost switched-capacitor DC-DC voltage regulator using delta-sigma control loop.
ISCAS (4) 2002: 743-746 |
| 1987 |
|---|
| 1 | | James Clifford,
A. Rao:
A Simple, General Structure for Temporal Domains.
Temporal Aspects in Information Systems 1987: 17-28 |
