Volume 29,
Number 1,
January 1980
Correspondence
Volume 29,
Number 2,
February 1980
- Gene L. Haviland, Al A. Tuszynski:
A CORDIC Arithmethic Processor Chip.
68-79
- Michel C. Rahier, Paul G. A. Jespers:
Dedicated LSI for a Microprocessor-Controlled Hand-Carried OCR System.
79-88
- Yuzo Kita, Noboru Yamaguchi, Mamoru Sugie, Shigeru Yoshizawa:
The Development of a Bubble Memory Controller for Low-Cost File Use.
89-96
- Matt Townsend, Marcian E. Hoff Jr., Robert E. Holm:
An NMOS Microprocessor for Analog Signal Processing.
97-102
- Tsuneo Funabashi, Katsuaki Takagi, Toshiro Tsukada, Hideo Nakamura, Michio Hara:
An NMOS Microcomputer Peripheral Interface Unit Incorporating an Analog-to-Digital Converter.
102-107
- David A. Patterson, Carlo H. Séquin:
Design Considerations for Single-Chip Computers of the Future.
108-116
- Alan J. Weissberger:
An LSI Implementation of an Intelligent CRC Computer and Programmable Character Comparator.
116-124
- Rodger A. Cliff:
Acceptable Testing of VLSI Components Which Contain Error Correctors.
126-134
- Jan Zeman, H. Troy Nagle Jr.:
A High-Speed Microprogrammable Digital Signal Processor Employing Distributed Arithmetic.
134-144
- Ayakannu Mathialagan, Nripendra N. Biswas:
Optimal Interconnections in the Design of Microprocessors and Digital Systems.
145-149
- Jega A. Arulpragasam, Robert A. Giggi, Richard F. Lary, Daniel T. Sullivan, Chin-Chang Wu:
Modular Minicomputers Using Microprocessors.
149-160
- John J. Lenahan, Fergus K. Fung:
Performance of Cooperative Loosely Coupled Microprocessor Architectures in an Interactive Data Base Task.
161-180
- Daniel Tabak, G. Jack Lipovski:
MOVE Architecture in Digital Controllers.
180-190
Correspondence
Volume 29,
Number 3,
March 1980
Correspondence
Volume 29,
Number 4,
April 1980
Correspondence
Volume 29,
Number 5,
May 1980
Correspondece
- Daniel Gajski:
Parallel Compressors.
393-398
- William W. Warlick Jr., John E. Hershey:
High-Speed M-Sequence Generators.
398-400
- K. Wayne Current:
Pipelined Binary Parallel Counters Employing Latched Quaternary Logic Full Adders.
400-403
- K. Wayne Current:
A High Data-Rate Digital Output Correlator Design.
403-405
- Takeomi Tamesada:
Sequential Machines Having Quasi-Stable States.
405-408
- Dennis R. Morgan:
Autocorrelation Function of Sequential M-Bit Words Taken from an N-Bit Shift Register (PN) Sequence.
408-410
- Jacob Savir:
Testing for Single Intermittent Failures in Combinational Circuits by Maximizing the Probability of Fault Detection.
410-416
Volume 29,
Number 6,
June 1980
Correspondence
- James E. Smith:
Measures of the Effectiveness of Fault Signature Analysis.
510-514
- René David, Pascale Thévenod-Fosse:
Minimal Detecting Transition Sequences: Application to Random Testing.
514-518
- Vinod K. Agarwal:
Multiple Fault Detection in Programmable Logic Arrays.
518-522
- Mark G. Karpovsky, Stephen Y. H. Su:
Detection and Location of Input and Feedback Bridging Faults Among Input and Output Lines.
523-527 ,
Correction:
IEEE Transactions on Computer 30(1):
86 (1981)
- J. Galiay, Yves Crouzet, M. Vergniault:
Physical Versus Logical Fault Models MOS LSI Circuits: Impact on Their Testability.
527-531
- Yves Crouzet, Christian Landrault:
Design of Self-Checking MOS-LSI Circuits: Application to a Four-Bit Microprocessor.
532-537
- Daniel Etiemble:
Multivalued I2L Circuits for TSC Checkers.
537-540
- Luca Simoncini, F. Saheban, Arthur D. Friedman:
Design of Self-Diagnosable Multiprocessor Systems with Concurrent Computation and Diagnosis.
540-546
- P. A. Lee, N. Ghani, K. Heron:
A Recovery Cache for the PDP-11.
546-549
Volume 29,
Number 7,
July 1980
- Kin-Man Chung, Fabrizio Luccio, C. K. Wong:
On the Complexity of Sorting in Magnetic Bubble Memory Systems.
553-563
- Frances L. Van Scoy:
The Parallel Recognition of Classes of Graphs.
563-570
- Jon Louis Bentley, Derick Wood:
An Optimal Worst Case Algorithm for Reporting Intersections of Rectangles.
571-577
- Hiroshi Hagiwara, Shinji Tomita, Shigeru Oyanagi, Kiyoshi Shibayama:
A Dynamically Microprogammable Computer with Low-Level Parallelism.
577-595
- Simon S. Lam:
Packet Broadcast Networks - A Performance Analysis of the R-ALOHA Protocol.
596-603
- Tich T. Dao, Marc Davio, Colette Gossart:
Complex Number Arithmetic with Odd-Valued Logic.
604-611
- Samuel T. Chanson, Prem S. Sinha:
Optimization of Memory Hierarchies in Multiprogrammed Computer Systems With Fixed Cost Constraint.
611-618
- Francis Y. L. Chin, K. Samson Fok:
Fast Sorting Algorithms on Uniform Ladders (Multiple Shift-Register Loops).
618-631
- Omar Wing, John W. Huang:
A Computation Model of Parallel Solution of Linear Equations.
632-638
- Bulent I. Dervisoglu, Howard A. Sholl:
Theory and Design of Mixed-Mode Sequential Machines.
639-648
- John C. Sutton, Jon G. Bredeson:
Minimal Redundant Logic for High Reliability and Irredundant Testability.
648-656
Correspondence
- William A. Porter:
Polylogic Realization of Switching Functions.
657-659
- Chris R. Jesshope:
Some Results Concerning Data Routing in Array Processors.
659-662
- Moiez A. Tapia, Jerry H. Tucker:
Complete Solution of Boolean Equations.
662-665 ,
Corrections:
IEEE Transactions on Computer 30(1):
87 (1981),
30(10):
812 (1981)
- Bella Bose, T. R. N. Rao:
Separating and Completely Separating Systems and Linear Codes.
665-668
- René David:
Testing by Feedback Shift Register.
668-673
- Jacob Savir:
Detection of Single Intermittent Faults in Sequential Circuits.
673-678
Volume 29,
Number 8,
August 1980
Correspondence
Volume 29,
Number 9,
September 1980
Correspondence
Volume 29,
Number 10,
October 1980
Correspondence
Volume 29,
Number 11,
November 1980
Correspondence
Volume 29,
Number 12,
December 1980
- Rami R. Razouk, Gerald Estrin:
Modeling and Verification of Communication Protocols in SARA: The X.21 Interface.
1038-1052
- Parviz Kermani, Leonard Kleinrock:
A Tradeoff Study of Switching Systems in Computer Communication Networks.
1052-1060
- Georges Gardarin, Wesley W. Chu:
A Distributed Control Algorithm for Reliably and Consistently Updating Replicated Databases.
1060-1068
- Peter P. Chen, Jacky Akoka:
Optimal Design of Distributed Information Systems.
1068-1080
- Michael J. Flynn, John L. Hennessy:
Parallelism and Representation Problems in Distributed Systems.
1060-1086
- Mario J. Gonzalez Jr., Bernard W. Jordan Jr.:
A Framework for the Quantitative Evaluation of Distributed Computer Systems.
1087-1094
- James R. McGraw:
Data Flow Computing - Software Development.
1095-1103
- Reid G. Smith:
The Contract Net Protocol: High-Level Communication and Control in a Distributed Problem Solver.
1104-1113 ,
Correction:
IEEE Transactions on Computer 30(5):
372 (1981)
- Steven I. Kartashev, Svetlana P. Kartashev:
Problems of Designing Supersystems with Dynamic Architectures.
1114-1132
- Larry D. Wittie, André M. Van Tilborg:
MICROS, A Distributed Operating System for MICRONET, A Reconfigurable Network Computer.
1133-1144
- Victor R. Lesser, Lee D. Erman:
Distributed Interpretation: A Model and Experiment.
1144-1163
Copyright © Fri Mar 12 17:32:52 2010
by Michael Ley (ley@uni-trier.de)
