Volume 32,
Number 1,
January 1983
- Zary Segall, Ajay Singh, Richard T. Snodgrass, Anita K. Jones, Daniel P. Siewiorek:
An Integrated Instrumentation Environment for Multiprocessors.
4-14
- Hansjörg Fromm, Uwe Hercksen, Ulrich Herzog, Karl-Heinz John, Rainer Klar, Wolfgang Kleinöder:
Experiences with Performance Measurement and Modeling of a Processor Array.
15-31
- Dennis Parkinson, Heather M. Liddell:
The Measurement of Performance on a Highly Parallel System.
32-37
- Phil C. C. Yeh, Janak H. Patel, Edward S. Davidson:
Shared Cache for Multiple-Stream Computer Systems.
38-47
- Faye A. Briggs, Michel Dubois:
Effectiveness of Private Caches in Multiprocessor Systems with Parallel-Pipelined Memories.
48-59
- Marco Ajmone Marsan, Gianfranco Balbo, Gianni Conte, Francesco Gregoretti:
Modeling Bus Contention and Memory Interference in a Multiprocessor System.
60-72
- Philip Heidelberger, Kishor S. Trivedi:
Analytic Queueing Models for Programs with Internal Concurrency.
73-82
- Daniel A. Reed, Herbert D. Schwetman:
Cost-Performance Bounds for Multimicrocomputer Networks.
83-95
Correspondence
Volume 32,
Number 2,
February 1983
- Gordon K. Lin, Premachandran R. Menon:
Totally Preset Checking Experiments for Sequential Machines.
101-108
- Tomás Lozano-Pérez:
Spatial Planning: A Configuration Space Approach.
108-120
- Gregor von Bochmann, Michel Raynal:
Structured Specification of Communicating Systems.
120-133
- Yaron I. Gold, William R. Franta, Shlomo Moran:
A Distributed Channel-Access Protocol for Fully-Connected Networks with Mobile Nodes.
133-147
- Gilles H. Garcia, William J. Kubitz:
Minimum Mean Running Time Function Generation Using Read-Only Memory.
147-156
- Michael J. Flynn, Lee W. Hoevel:
Execution Architecture: The DELtran Experiment.
156-175
- Allan Gottlieb, Ralph Grishman, Clyde P. Kruskal, Kevin P. McAuliffe, Larry Rudolph, Marc Snir:
The NYU Ultracomputer - Designing an MIMD Shared Memory Parallel Computer.
175-189
- Zeev Barzilai, Don Coppersmith, Arnold L. Rosenberg:
Exhaustive Generation of Bit Patterns with Applications to VLSI Self-Testing.
190-194
Correspondence
Volume 32,
Number 3,
March 1983
Correspondence
Volume 32,
Number 4,
April 1983
Correspondence
Volume 32,
Number 5,
May 1983
Correspondence
Volume 32,
Number 6,
June 1983
Correspondence
Volume 32,
Number 7,
July 1983
- José C. Barros, Brian W. Johnson:
Equivalence of the Arbiter, the Synchronizer, the Latch, and the Inertial Delay.
603-614
- Chin-Long Chen:
Error-Correcting Codes with Byte Error-Detection Capability.
615-621
- Michael C. McFarland, Alice C. Parker:
An Abstract Model of Behavior for Hardware Descriptions.
621-637
- Dharma P. Agrawal:
Graph Theoretical Analysis and Design of Multistage Interconnection Networks.
637-648
- Gerald M. Masson, S. Brent Morris:
Expected Capacity of (m over 2)-Networks.
649-657
- Christoph von Conta:
Torus and Other Networks as Communication Networks With Up to Some Hundred Points.
657-666
- Jean-Loup Baer, Hung-Chang Du, Richard E. Ladner:
Binary Search in a Multiprocessing Environment.
667-677
- Leon E. Winslow, Yuan-Chieh Chow:
The Analysis and Design of Some New Sorting Machines.
677-683
- Gérard M. Baudet, Franco P. Preparata, Jean Vuillemin:
Area-Time Optimal VLSI Circuits for Convolution.
684-688
Correspondence
Volume 32,
Number 8,
August 1983
Correspondence
- Nuno Bandeira, Ken Vaccaro, James A. Howard:
A Two's Complement Array Multiplier Using True Values of the Operands.
745-747
- Ranjan Chaudhuri, Son Pham, Oscar N. Garcia:
Solution of an Open Problem on Probabilistic Grammars.
748-750
- Gian Carlo Bongiovanni:
Two VLSI Structures for the Discrete Fourier Transform.
750-754
- Sharad C. Seth, Lester Lipsky:
A Simplified Method to Calculate Failure Times in Fault-Tolerant Systems.
754-760
- Werner Bux:
Analysis of a Local-Area Bus System with Controlled Access.
760-763
- Wesley W. Chu, Wilhelm Haller, Kin K. Leung:
Reservation Channel Access Protocol for High Speed Local Networks with Star Configurations.
763-766
- P. V. Afshari, Steven C. Bruell, Richard Y. Kain:
On the Load Balancing Bus Accessing Scheme.
766-770
- Curtis Abbott:
A Symbolic Simulator for Microprogram Development.
770-774
- A. F. Bashir, V. Susarla, K. Vairavan:
A Statistical Study of the Performance of a Task Scheduling Algorithm.
774-777
- Anton T. Dahbura, Gerald M. Masson:
Greedy Diagnosis of Hybrid Fault Situations.
777-782
- Makoto Imase, Masaki Itoh:
A Design for Directed Graphs with Minimum Diameter.
782-784
Volume 32,
Number 9,
September 1983
Correspondence
Volume 32,
Number 10,
October 1983
Correspondence
Volume 32,
Number 11,
November 1983
Correspondence
Volume 32,
Number 12,
December 1983
- Vijay Pitchumani, Edward P. Stabler:
An Inductive Assertion Method for Register Transfer Level Design Verification.
1073-1080
- Laxmi N. Bhuyan, Dharma P. Agrawal:
Design and Performance of Generalized Interconnection Networks.
1081-1090
- Clyde P. Kruskal, Marc Snir:
The Performance of Multistage Interconnection Networks for Multiprocessors.
1091-1098
- Krishnan Padmanabhan, Duncan H. Lawrie:
A Class of Redundant Path Multistage Interconnection Networks.
1099-1108
- Mandayam A. Srinivas:
Optimal Parallel Scheduling of Gaussian Elimination DAG's.
1109-1117
- Robert Geist, Kishor S. Trivedi:
Ultrahigh Reliability Prediction for Fault-Tolerant Computer Systems.
1118-1127
- Paul Chow, Zvonko G. Vranesic, Jui Lin Yen:
A Pipelined Distributed Arithmetic PFFT Processor.
1128-1136
- Hideo Fujiwara, Takeshi Shimono:
On the Acceleration of Test Generation Algorithms.
1137-1144
- Donald T. Tang, Lin S. Woo:
Exhaustive Test Pattern Generation with Constant Weight Vectors.
1145-1150
- Özalp Babaoglu, Domenico Ferrari:
Two-Level Replacement Decisions in Paging Stores.
1151-1159
- Philip S. Liu, Tzay Y. Young:
VLSI Array Design Under Constraint of Limited I/O Bandwidth.
1160-1170
- Clark D. Thompson:
The VLSI Complexity of Sorting.
1171-1184
Correspondence
Copyright © Fri Mar 12 17:32:52 2010
by Michael Ley (ley@uni-trier.de)
