2. AWOC 1986:
Loutraki,
Greece
Fillia Makedon, Kurt Mehlhorn, Theodore S. Papatheodorou, Paul G. Spirakis (Eds.):
VLSI Algorithms and Architectures, Aegean Workshop on Computing, Loutraki, Greece, July 8-11, 1986, Proceedings.
Lecture Notes in Computer Science 227 Springer 1986, ISBN 3-540-16766-8 
@proceedings{DBLP:conf/awoc/1986,
editor = {Fillia Makedon and
Kurt Mehlhorn and
Theodore S. Papatheodorou and
Paul G. Spirakis},
title = {VLSI Algorithms and Architectures, Aegean Workshop on Computing,
Loutraki, Greece, July 8-11, 1986, Proceedings},
booktitle = {AWOC},
publisher = {Springer},
series = {Lecture Notes in Computer Science},
volume = {227},
year = {1986},
isbn = {3-540-16766-8},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
- Gianfranco Bilardi, Franco P. Preparata:
Digital Filtering in VLSI.
1-11
- David P. Helmbold, Ernst W. Mayr:
Two Processor Scheduling is in NC.
12-25
- Greg N. Frederickson, Nicola Santoro:
Breaking Symmetry in Synchronous Networks.
26-33
- Yael Maon, Baruch Schieber, Uzi Vishkin:
Parallel Ear Decomposition Search (EDS) and St-Numbering in Graphs (Extended Abstract).
34-45
- Concettina Guerra:
A Unifying Framework for Systolic Designs.
46-56
- Alok Aggarwal, S. Rao Kosaraju:
Optimal Tradeoffs for Addition on Systolic Arrays (Extended Abstract).
57-69
- Günter Rote:
On the Connection Between Hexagonal and Unidirectional Rectangular Systolic Arrays.
70-83
- Manfred Kunde:
Lower Bounds for Sorting on Mesh-Connected Architectures.
84-95
- Arnold L. Rosenberg:
Diogenes, Circa 1986.
96-107
- Paul M. B. Vitányi:
Nonsequentail Computation and Laws of Nature.
108-120
- Rolf Müller, Thomas Lengauer:
Linear Algorithms For Two CMOS Layout Problems.
121-132
- Elena Lodi, Linda Pagli:
Some New Results on a Restricted Channel Routing Problem.
133-143
- Antonis M. Paschalis, Dimitris Nikolos, Constantine Halatsis:
Efficient Modular Design of TSC Checkers for M-out-of-2M Codes.
144-155
- I-Chang Jou, Yu Hen Hu, T. M. Parng:
VLSI Algorithms and Pipelined Architectures for Solving Structured Linear System.
156-165
- Nick Kanopoulos, Peter N. Marinos:
A High-Performance Single-Chip VLSI Signal Processor Architecture.
166-179
- Thomas Lengauer:
Exploiting Hierarchy in VLSI Design.
180-193
- Lefteris M. Kirousis:
A Polynomial Algorithm for Recognizing Images of Polyhedra.
194-204
- Eliezer Dekel, Simeon C. Ntafos, Shietung Peng:
Parallel Tree Techniques and Code Optimization.
205-216
- Martin Fürer, Kurt Mehlhorn:
AT2-Optimal Galois Field Multiplier for VLSI.
217-225
- Mihalis Yannakakis:
Linear and Book Embeddings of Graphs.
226-235
- Gary L. Miller, Vijaya Ramachandran, Erich Kaltofen:
Efficient Parallel Evaluation of Straight-line Code and Arithmetric Circuits.
236-245
- Dario Bini, Victor Y. Pan:
A Logarithmic Boolean Time Algorithm for Parallel Polynomial Division.
246-251
- Zevi Miller, Ivan Hal Sudborough:
A Polynomial Algorithm for Recognizing Samll Cutwidth in Hypergraphs.
252-260
- Torben Hagerup, Wolfgang Rülling:
A Generalized Topological Sorting Problem.
261-270
- Janusz A. Brzozowski, Michael Yoeli:
Combinatorial Static CMOD Networks (Extended Summary).
271-282
- Victor Y. Pan, John H. Reif:
Fast and Efficient Parallel Linear Programming and Linear Least Squares Computations.
283-295
- Ian Parberry:
On the Time Required to Sum n Semigroup Elements on a Parallel Machine with Simultaneous Writes.
296-304
- Alexandros Biliris:
A Comparative Study of Concurrency Control Methods in B-Trees.
305-316
- Jean R. S. Blair, Errol L. Lloyd:
Generalized River Routing - Algorithms and Performance Bounds (Extended Abstract).
317-328
Copyright © Fri Mar 12 17:06:49 2010
by Michael Ley (ley@uni-trier.de)
