ICPP 1986:
University Park,
PA,
USA
International Conference on Parallel Processing (ICPP '86),
University Park,
PA,
USA,
August 1986. IEEE Computer Society Press,
1986
Session Ia:
Interconnection Networks I
Session 1b:
Memory Management I
Session 1c:
Mathematical Analysis and Computation
Session 2a:
Interconnection Networks II
Session 2b:
Memory Management II
Session 2c:
Parallel Processing Languages
- Dilip Sarkar, Narsingh Deo:
Estimating the Speedup in Parallel Parsing.
157-163
- Randy Allen, Donn Bäumgartner, Ken Kennedy, Allan Porterfield:
PTOOL : A Semi-Automatic Parallel Programming Assistant.
164-170
- Thomas Macke, Christopher Huson, James Davies, Michael Wolfe, Bruce Leasure:
The KAP/ST-100 A Fortran Translator for the ST-100 Attached Processor.
171-175
- Tzilla Elrad, Fred A. Maymir-Ducharme:
Distributed Languages Design Constructs for Controlling Preferences.
176-183
- Henry G. Dietz, David Klappholz:
Refined Fortran: Another Sequential Language for Parallel Programming.
184-191
Session 3a:
Interconnection Networks III
Session 3b:
Operating Systems
Session 3c:
Parallel Algorithms I
Session 4a:
Array Processors
Session 4b:
Fault Tolerant Designs
Session 4c:
Parallel Algorithms II
- John G. Lewis, Horst D. Simon:
The Impact of Hardware Gather/Scatter on Sparse Gaussian Elimination.
366-368
- Torstein Opsahl, Dennis Parkinson:
An Algorithm for Solving Sparse Sets of Linear Equations with an Almost Tri-Diagonal Structure on SIMD Computers.
369-374
- Donald A. Calahan:
Block-Oriented, Local-Memory Based Linear Equation Solution on the Cray-2 Uniprocessor Algorithms.
375-378
- Ali R. Hurson:
VLSI Time/Space Complexity of an Associative Parallel Join Module.
379-386
Session 5a:
CLSI and Optical Architectures
Session 5b:
Pefromance Analysis and Fault Tolerence
Session 5c:
Parallel Algorithms III
Session 6a:
Multiprocessors I
Session 6b:
Pipeline/Vector Processors
Session 6a:
Parallel Computation I
Session 7a:
Multiprocessors II
Session 7b:
Dataflow Computers
Session 7c:
Parallel Computation II
Session 8a:
Hypercube Architecture
Session 8b:
Systolic Architecture I
Session 8c:
Artificial Intelligence
Session 9a:
Supercomputing Hardware
Session 9b:
Systolic Architecture II
Session 9c:
Simulation and Modeling
Session 10a:
Multifrid/Mesh Applications
Session 10b:
Cevtorization/Data Flow Processing
- Christopher Huson, Thomas Macke, James Davies, Michael Wolfe, Bruce Leasure:
The KAP/205 : An Advanced Source-to-Source Vectorizer for the Cyber 205 Supercomputer.
827-832
- Christopher Huson, Thomas Macke, James Davies, Michael Wolfe, Bruce Leasure:
The KAP/S-1 : An Advanced Source-to-Source Vectorizer for the S-1 Mark IIa Supercomputer.
833-835
- Ron Cytron:
Doacross: Beyond Vectorization for Multiprocessors.
836-844
- Robert G. Babb II, Lise Storc, William C. Ragsdale:
A Large-Grain Data Flow Scheduler for Parallel Processing on CYBERPLUS.
845-848
- Maya Gokhale:
Macro vs. Micro Dataflow: A Programming Example.
849-852
Session 10c:
Graph Theory
Session 11a:
Parallel Processing Techniques
- Jik H. Chang, Oscar H. Ibarra, Michael A. Palis:
Parallel Parsing on a One-Way Array of Finite-State Machines.
887-894
- M. Martin, Donald M. Chiarulli, S. Sitharama Iyengar:
Parallel Processing of Quadtrees on a Horizontally Reconfigurable Architecture Computing System.
895-902
- Sandeep Sen, Isaac D. Scherson, Adi Shamir:
Shear Sort: A True Two-Dimensional Sorting Techniques for VLSI Networks.
903-908
- Michel Dubois, Faye A. Briggs, Indira Patil, Meera Balakrishnan:
Trace-Driven Simulations of Parallel and Distributed Algorithms in Multiprocessors.
909-916
- Richard J. Lipton, Daniel P. Lopresti:
Delta Transformations to Simplify VLSI Processor Arrays for Serial Dynamic Programming.
917-920
Session 11b:
Data Structures I
Session 11c:
Distributed Processing I
Session 12a:
Logic Programming
Session 12b:
Data Structures II
Session 12c:
Distrubuted Processing II
Copyright © Fri Mar 12 17:14:52 2010
by Michael Ley (ley@uni-trier.de)
