![]() | 2009 | |
---|---|---|
165 | ![]() ![]() ![]() ![]() ![]() ![]() | Chuan-Yue Yang, Jian-Jia Chen, Tei-Wei Kuo, Lothar Thiele: An approximation scheme for energy-efficient scheduling of real-time tasks in heterogeneous multiprocessor systems. DATE 2009: 694-699 |
164 | ![]() ![]() ![]() ![]() ![]() ![]() | Nikolay Stoimenov, Simon Perathoner, Lothar Thiele: Reliable mode changes in real-time systems with fixed priority or EDF scheduling. DATE 2009: 99-104 |
163 | ![]() ![]() ![]() ![]() ![]() ![]() | Kai Lampka, Simon Perathoner, Lothar Thiele: Analytic real-time analysis and timed automata: a hybrid method for analyzing embedded real-time systems. EMSOFT 2009: 107-116 |
162 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele, Nikolay Stoimenov: Modular performance analysis of cyclic dataflow graphs. EMSOFT 2009: 127-136 |
161 | ![]() ![]() ![]() ![]() ![]() ![]() | Wolfgang Haid, Lars Schor, Kai Huang, Iuliana Bacivarov, Lothar Thiele: Efficient execution of Kahn process networks on multi-processor systems using protothreads and windowed FIFOs. ESTImedia 2009: 35-44 |
160 | ![]() ![]() ![]() ![]() ![]() ![]() | Matthias Woehrle, Kai Lampka, Lothar Thiele: Exploiting Timed Automata for Conformance Testing of Power Measurements. FORMATS 2009: 275-290 |
159 | ![]() ![]() ![]() ![]() ![]() ![]() | Kai Huang, Luca Santinelli, Jian-Jia Chen, Lothar Thiele, Giorgio C. Buttazzo: Adaptive Dynamic Power Management for Hard Real-Time Systems. IEEE Real-Time Systems Symposium 2009: 23-32 |
158 | ![]() ![]() ![]() ![]() ![]() ![]() | Jian-Jia Chen, Nikolay Stoimenov, Lothar Thiele: Feasibility Analysis of On-Line DVS Algorithms for Scheduling Arbitrary Event Streams. IEEE Real-Time Systems Symposium 2009: 261-270 |
157 | ![]() ![]() ![]() ![]() ![]() ![]() | Nathan Fisher, Jian-Jia Chen, Shengquan Wang, Lothar Thiele: Thermal-Aware Global Real-Time Scheduling on Multicore Systems. IEEE Real-Time and Embedded Technology and Applications Symposium 2009: 131-140 |
156 | ![]() ![]() ![]() ![]() ![]() ![]() | Jian-Jia Chen, Shengquan Wang, Lothar Thiele: Proactive Speed Scheduling for Real-Time Tasks under Thermal Constraints. IEEE Real-Time and Embedded Technology and Applications Symposium 2009: 141-150 |
155 | ![]() ![]() ![]() ![]() ![]() ![]() | Andreas Schranzhofer, Jian-Jia Chen, Lothar Thiele: Power-Aware Mapping of Probabilistic Applications onto Heterogeneous MPSoC Platforms. IEEE Real-Time and Embedded Technology and Applications Symposium 2009: 151-160 |
154 | ![]() ![]() ![]() ![]() ![]() ![]() | Jian-Jia Chen, Andreas Schranzhofer, Lothar Thiele: Energy minimization for periodic real-time tasks on heterogeneous processing units. IPDPS 2009: 1-12 |
153 | ![]() ![]() ![]() ![]() ![]() ![]() | Clemens Moser, Jian-Jia Chen, Lothar Thiele: Power management in energy harvesting embedded systems with discrete service levels. ISLPED 2009: 413-418 |
152 | ![]() ![]() ![]() ![]() ![]() ![]() | Shengquan Wang, Jian-Jia Chen, Zhenjun Shi, Lothar Thiele: Energy-Efficient Speed Scheduling for Real-Time Tasks under Thermal Constraints. RTCSA 2009: 201-209 |
151 | ![]() ![]() ![]() ![]() ![]() ![]() | Jian-Jia Chen, Lothar Thiele: Task Partitioning and Platform Synthesis for Energy Efficiency. RTCSA 2009: 393-402 |
150 | ![]() ![]() ![]() ![]() ![]() ![]() | Clemens Moser, Jian-Jia Chen, Lothar Thiele: Optimal service level allocation in environmentally powered embedded systems. SAC 2009: 1650-1657 |
149 | ![]() ![]() ![]() ![]() ![]() ![]() | Matthias Keller, Jan Beutel, Andreas Meier, Roman Lim, Lothar Thiele: Learning from sensor network data. SenSys 2009: 383-384 |
148 | ![]() ![]() ![]() ![]() ![]() ![]() | Jan Beutel, Roman Lim, Andreas Meier, Lothar Thiele, Christoph Walser, Matthias Woehrle, Mustafa Yuecel: The FlockLab testbed architecture. SenSys 2009: 415-416 |
147 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele, Kaisa Miettinen, Pekka J. Korhonen, Julián Molina Luque: A Preference-Based Evolutionary Algorithm for Multi-Objective Optimization. Evolutionary Computation 17(3): 411-436 (2009) |
146 | ![]() ![]() ![]() ![]() ![]() ![]() | Samarjit Chakraborty, Tulika Mitra, Abhik Roychoudhury, Lothar Thiele: Cache-aware timing analysis of streaming applications. Real-Time Systems 41(1): 52-85 (2009) |
2008 | ||
145 | ![]() ![]() ![]() ![]() ![]() ![]() | Davide Brunelli, Luca Benini, Clemens Moser, Lothar Thiele: An Efficient Solar Energy Harvester for Wireless Sensor Nodes. DATE 2008: 104-109 |
144 | ![]() ![]() ![]() ![]() ![]() ![]() | Clemens Moser, Lothar Thiele, Davide Brunelli, Luca Benini: Robust and Low Complexity Rate Control for Solar Powered Sensors. DATE 2008: 230-235 |
143 | ![]() ![]() ![]() ![]() ![]() ![]() | Bengt Jonsson, Simon Perathoner, Lothar Thiele, Wang Yi: Cyclic dependencies in modular performance analysis. EMSOFT 2008: 179-188 |
142 | ![]() ![]() ![]() ![]() ![]() ![]() | Clemens Moser, Lothar Thiele, Davide Brunelli, Luca Benini: Approximate Control Design for Solar Driven Sensor Nodes. HSCC 2008: 634-637 |
141 | ![]() ![]() ![]() ![]() ![]() ![]() | Jian-Jia Chen, Lothar Thiele: Energy-Efficient Task Partition for Periodic Real-Time Tasks on Platforms with Dual Processing Elements. ICPADS 2008: 161-168 |
140 | ![]() ![]() ![]() ![]() ![]() ![]() | Jian-Jia Chen, Lothar Thiele: Expected system energy consumption minimization in leakage-aware DVS systems. ISLPED 2008: 315-320 |
139 | ![]() ![]() ![]() ![]() ![]() ![]() | Eckart Zitzler, Joshua D. Knowles, Lothar Thiele: Quality Assessment of Pareto Set Approximations. Multiobjective Optimization 2008: 373-404 |
138 | ![]() ![]() ![]() ![]() ![]() ![]() | Eckart Zitzler, Lothar Thiele, Johannes Bader: SPAM: Set Preference Algorithm for Multiobjective Optimization. PPSN 2008: 847-858 |
137 | ![]() ![]() ![]() ![]() ![]() ![]() | Clemens Moser, Jian-Jia Chen, Lothar Thiele: Reward Maximization for Embedded Systems with Renewable Energies. RTCSA 2008: 247-256 |
136 | ![]() ![]() ![]() ![]() ![]() ![]() | Kai Huang, Iuliana Bacivarov, Fabian Hugelshofer, Lothar Thiele: Scalably distributed SystemC simulation for embedded applications. SIES 2008: 271-274 |
135 | ![]() ![]() ![]() ![]() ![]() ![]() | Matthias Woehrle, Christian Plessl, Roman Lim, Jan Beutel, Lothar Thiele: EvAnT: Analysis and Checking of Event Traces for Wireless Sensor Networks. SUTC 2008: 201-208 |
134 | ![]() ![]() ![]() ![]() ![]() ![]() | Andreas Meier, Mischa Weise, Jan Beutel, Lothar Thiele: NoSE: efficient initialization of wireless sensor networks. SenSys 2008: 397-398 |
2007 | ||
133 | ![]() ![]() ![]() ![]() ![]() ![]() | Boudewijn R. Haverkort, Joost-Pieter Katoen, Lothar Thiele: Quantitative Aspects of Embedded Systems, 04.03. - 09.03.2007 Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany 2007 |
132 | ![]() ![]() ![]() ![]() ![]() ![]() | Paul Lukowicz, Lothar Thiele, Gerhard Tröster: Architecture of Computing Systems - ARCS 2007, 20th International Conference, Zurich, Switzerland, March 12-15, 2007, Proceedings Springer 2007 |
131 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele, Iuliana Bacivarov, Wolfgang Haid, Kai Huang: Mapping Applications to Tiled Multiprocessor Embedded Systems. ACSD 2007: 29-40 |
130 | ![]() ![]() ![]() ![]() ![]() ![]() | Kai Huang, D. Grunert, Lothar Thiele: Windowed FIFOs for FPGA-based Multiprocessor Systems. ASAP 2007: 36-41 |
129 | ![]() ![]() ![]() ![]() ![]() ![]() | Wolfgang Haid, Lothar Thiele: Complex task activation schemes in system level performance analysis. CODES+ISSS 2007: 173-178 |
128 | ![]() ![]() ![]() ![]() ![]() ![]() | Simon Künzli, Arne Hamann, Rolf Ernst, Lothar Thiele: Combined approach to system level performance analysis of embedded systems. CODES+ISSS 2007: 63-68 |
127 | ![]() ![]() ![]() ![]() ![]() ![]() | Clemens Moser, Lothar Thiele, Davide Brunelli, Luca Benini: Adaptive power management in energy harvesting systems. DATE 2007: 773-778 |
126 | ![]() ![]() ![]() ![]() ![]() ![]() | Kai Huang, Lothar Thiele: Performance analysis of multimedia applications using correlated streams. DATE 2007: 912-917 |
125 | ![]() ![]() ![]() ![]() ![]() ![]() | Samarjit Chakraborty, Tulika Mitra, Abhik Roychoudhury, Lothar Thiele, Unmesh D. Bordoloi, Cem Derdiyok: Cache-Aware Timing Analysis of Streaming Applications. ECRTS 2007: 159-168 |
124 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele: Performance analysis of distributed embedded systems. EMSOFT 2007: 10 |
123 | ![]() ![]() ![]() ![]() ![]() ![]() | Simon Perathoner, Ernesto Wandeler, Lothar Thiele, Arne Hamann, Simon Schliecker, Rafik Henia, Razvan Racu, Rolf Ernst, Michael González Harbour: Influence of different system abstractions on the performance analysis of distributed real-time systems. EMSOFT 2007: 193-202 |
122 | ![]() ![]() ![]() ![]() ![]() ![]() | Matthias Dyer, Jan Beutel, Thomas Kalt, Patrice Oehen, Lothar Thiele, Kevin Martin, Philipp Blum: Deployment Support Network. EWSN 2007: 195-211 |
121 | ![]() ![]() ![]() ![]() ![]() ![]() | Matthias Woehrle, Christian Plessl, Jan Beutel, Lothar Thiele: Increasing the reliability of wireless sensor networks with a distributed testing framework. EmNets 2007: 93-97 |
120 | ![]() ![]() ![]() ![]() ![]() ![]() | Boudewijn R. Haverkort, Joost-Pieter Katoen, Lothar Thiele: 07101 Abstracts Collection -- Quantitative Aspects of Embedded Systems. Quantitative Aspects of Embedded Systems 2007 |
119 | ![]() ![]() ![]() ![]() ![]() ![]() | Boudewijn R. Haverkort, Joost-Pieter Katoen, Lothar Thiele: 07101 Executive Summary -- Quantitative Aspects of Embedded Systems. Quantitative Aspects of Embedded Systems 2007 |
118 | ![]() ![]() ![]() ![]() ![]() ![]() | Jens B. Schmitt, Frank A. Zdarsky, Lothar Thiele: A Comprehensive Worst-Case Calculus for Wireless Sensor Networks with In-Network Processing. RTSS 2007: 193-202 |
117 | ![]() ![]() ![]() ![]() ![]() ![]() | Linh T. X. Phan, Samarjit Chakraborty, P. S. Thiagarajan, Lothar Thiele: Composing Functional and State-Based Performance Models for Analyzing Heterogeneous Real-Time Systems. RTSS 2007: 343-352 |
116 | ![]() ![]() ![]() ![]() ![]() ![]() | Ernesto Wandeler, Lothar Thiele: Workload correlations in multi-processor hard real-time systems. J. Comput. Syst. Sci. 73(2): 207-224 (2007) |
115 | ![]() ![]() ![]() ![]() ![]() ![]() | Clemens Moser, Davide Brunelli, Lothar Thiele, Luca Benini: Real-time scheduling for energy harvesting sensor nodes. Real-Time Systems 37(3): 233-260 (2007) |
114 | ![]() ![]() ![]() ![]() ![]() ![]() | Joseph R. Cavallaro, Sanjay Rajopadhye, Lothar Thiele, Tobias Noll: Special Issue on ASAP 2004 Conference. VLSI Signal Processing 49(1): 1-2 (2007) |
2006 | ||
113 | ![]() ![]() ![]() ![]() ![]() ![]() | Ernesto Wandeler, Lothar Thiele: Optimal TDMA time slot and cycle length allocation for hard real-time systems. ASP-DAC 2006: 479-484 |
112 | ![]() ![]() ![]() ![]() ![]() ![]() | Pier Stanislao Paolucci, Ahmed Amine Jerraya, Rainer Leupers, Lothar Thiele, Piero Vicini: SHAPES: : a tiled scalable software hardware architecture platform for embedded systems. CODES+ISSS 2006: 167-172 |
111 | ![]() ![]() ![]() ![]() ![]() ![]() | Simon Künzli, Francesco Poletti, Luca Benini, Lothar Thiele: Combining simulation and formal methods for system-level performance analysis. DATE 2006: 236-241 |
110 | ![]() ![]() ![]() ![]() ![]() ![]() | Ernesto Wandeler, Alexander Maxiaguine, Lothar Thiele: Performance analysis of greedy shapers in real-time systems. DATE 2006: 444-449 |
109 | ![]() ![]() ![]() ![]() ![]() ![]() | Clemens Moser, Davide Brunelli, Lothar Thiele, Luca Benini: Lazy Scheduling for Energy Harvesting Sensor Nodes. DIPES 2006: 125-134 |
108 | ![]() ![]() ![]() ![]() ![]() ![]() | Clemens Moser, Lothar Thiele, Luca Benini, Davide Brunelli: Real-Time Scheduling with Regenerative Energy. ECRTS 2006: 261-270 |
107 | ![]() ![]() ![]() ![]() ![]() ![]() | Eckart Zitzler, Dimo Brockhoff, Lothar Thiele: The Hypervolume Indicator Revisited: On the Design of Pareto-compliant Indicators Via Weighted Integration. EMO 2006: 862-876 |
106 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele, Ernesto Wandeler, Nikolay Stoimenov: Real-time interfaces for composing real-time systems. EMSOFT 2006: 34-43 |
105 | ![]() ![]() ![]() ![]() ![]() ![]() | Luca Negri, Lothar Thiele: Power Management for Bluetooth Sensor Networks. EWSN 2006: 196-211 |
104 | ![]() ![]() ![]() ![]() ![]() ![]() | Ernesto Wandeler, Lothar Thiele: Interface-Based Design of Real-Time Systems with Hierarchical Scheduling. IEEE Real Time Technology and Applications Symposium 2006: 243-252 |
103 | ![]() ![]() ![]() ![]() ![]() ![]() | Simon Künzli, Lothar Thiele: Generating event traces based on arrival curves. MMB 2006: 81-98 |
102 | ![]() ![]() ![]() ![]() ![]() ![]() | Samarjit Chakraborty, Yanhong Liu, Nikolay Stoimenov, Lothar Thiele, Ernesto Wandeler: Interface-Based Rate Analysis of Embedded Systems. RTSS 2006: 25-34 |
101 | ![]() ![]() ![]() ![]() ![]() ![]() | Amela Prelic, Stefan Bleuler, Philip Zimmermann, Anja Wille, Peter Bühlmann, Wilhelm Gruissem, Lars Hennig, Lothar Thiele, Eckart Zitzler: A systematic comparison and evaluation of biclustering methods for gene expression data. Bioinformatics 22(9): 1122-1129 (2006) |
100 | ![]() ![]() ![]() ![]() ![]() ![]() | Marco Laumanns, Lothar Thiele, Eckart Zitzler: An efficient, adaptive parameter variation scheme for metaheuristics based on the epsilon-constraint method. European Journal of Operational Research 169(3): 932-942 (2006) |
99 | ![]() ![]() ![]() ![]() ![]() ![]() | Ernesto Wandeler, Lothar Thiele, Marcel Verhoef, Paul Lieverse: System architecture evaluation using modular performance analysis: a case study. STTT 8(6): 649-667 (2006) |
2005 | ||
98 | ![]() ![]() ![]() ![]() ![]() ![]() | Manfred Morari, Lothar Thiele: Hybrid Systems: Computation and Control, 8th International Workshop, HSCC 2005, Zurich, Switzerland, March 9-11, 2005, Proceedings Springer 2005 |
97 | ![]() ![]() ![]() ![]() ![]() ![]() | Ernesto Wandeler, Lothar Thiele: Abstracting functionality for modular performance analysis of hard real-time systems. ASP-DAC 2005: 697-702 |
96 | ![]() ![]() ![]() ![]() ![]() ![]() | Alexander Maxiaguine, Samarjit Chakraborty, Lothar Thiele: DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs. CODES+ISSS 2005: 111-116 |
95 | ![]() ![]() ![]() ![]() ![]() ![]() | Samarjit Chakraborty, Lothar Thiele: A New Task Model for Streaming Applications and Its Schedulability Analysis. DATE 2005: 486-491 |
94 | ![]() ![]() ![]() ![]() ![]() ![]() | Ernesto Wandeler, Lothar Thiele: Real-time interfaces for interface-based design of real-time systems with fixed priority scheduling. EMSOFT 2005: 80-89 |
93 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele: Analitic Performance Analysis of Distributed Embedded Systems. FDL 2005: 31-33 |
92 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele: Modular Performance Analysis of Distributed Embedded Systems. FORMATS 2005: 1 |
91 | ![]() ![]() ![]() ![]() ![]() ![]() | Christian Haubelt, Marek Jersak, Kai Richter, Karsten Strehl, Dirk Ziegenbein, Rolf Ernst, Jürgen Teich, Lothar Thiele: SPI-Workbench - Modellierung, Analyse und Optimierung eingebetteter Systeme. GI Jahrestagung (2) 2005: 693-697 |
90 | ![]() ![]() ![]() ![]() ![]() ![]() | Ernesto Wandeler, Lothar Thiele: Characterizing Workload Correlations in Multi Processor Hard Real-Time Systems. IEEE Real-Time and Embedded Technology and Applications Symposium 2005: 46-55 |
89 | ![]() ![]() ![]() ![]() ![]() ![]() | Jan Beutel, Matthias Dyer, Lennart Meier, Lothar Thiele: Scalable topology control for deployment-support networks. IPSN 2005: 359-363 |
88 | ![]() ![]() ![]() ![]() ![]() ![]() | Lennart Meier, Lothar Thiele: Brief announcement: gradient clock synchronization in sensor networks. PODC 2005: 238 |
87 | ![]() ![]() ![]() ![]() ![]() ![]() | Marco Laumanns, Lothar Thiele, Eckart Zitzler: An Adaptive Scheme to Generate the Pareto Front Based on the Epsilon-Constraint Method. Practical Approaches to Multi-Objective Optimization 2005 |
86 | ![]() ![]() ![]() ![]() ![]() ![]() | Ernesto Wandeler, Jörn W. Janneck, Edward A. Lee, Lothar Thiele: Counting Interface Automata and their Application in Static Analysis of Actor Models. SEFM 2005: 106-116 |
85 | ![]() ![]() ![]() ![]() ![]() ![]() | Ernesto Wandeler, Alexander Maxiaguine, Lothar Thiele: Quantitative Characterization of Event Streams in Analysis of Hard Real-Time Applications. Real-Time Systems 29(2-3): 205-225 (2005) |
2004 | ||
84 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele, Reinhard Wilhelm: Perspectives Workshop: Design of Systems with Predictable Behaviour, 16.-19. November 2003 IBFI, Schloss Dagstuhl, Germany 2004 |
83 | ![]() ![]() ![]() ![]() ![]() ![]() | Alexander Maxiaguine, Simon Künzli, Samarjit Chakraborty, Lothar Thiele: Rate analysis for streaming applications with on-chip buffer constraints. ASP-DAC 2004: 131-136 |
82 | ![]() ![]() ![]() ![]() ![]() ![]() | Alexander Maxiaguine, Simon Künzli, Lothar Thiele: Workload Characterization Model for Tasks with Variable Execution Demand. DATE 2004: 1040-1045 |
81 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele, Reinhard Wilhelm: Abstracts Collection. Design of Systems with Predictable Behaviour 2004 |
80 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele, Reinhard Wilhelm: Design for Time-Predictability. Design of Systems with Predictable Behaviour 2004 |
79 | ![]() ![]() ![]() ![]() ![]() ![]() | Philipp Blum, Lothar Thiele: Trace-based evaluation of clock synchronization algorithms for wireless loudspeakers. ESTImedia 2004: 7-12 |
78 | ![]() ![]() ![]() ![]() ![]() ![]() | Jan Beutel, Oliver Kasten, Friedemann Mattern, Kay Römer, Frank Siegemund, Lothar Thiele: Prototyping Wireless Sensor Network Applications with BTnodes. EWSN 2004: 323-338 |
77 | ![]() ![]() ![]() ![]() ![]() ![]() | Matthias Dyer, Marco Platzner, Lothar Thiele: Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine. FCCM 2004: 342-344 |
76 | ![]() ![]() ![]() ![]() ![]() ![]() | Ernesto Wandeler, Alexander Maxiaguine, Lothar Thiele: Quantitative Characterization of Event Streams in Analysis of Hard Real-Time Applications. IEEE Real-Time and Embedded Technology and Applications Symposium 2004: 450-461 |
75 | ![]() ![]() ![]() ![]() ![]() ![]() | Philipp Blum, Lennart Meier, Lothar Thiele: Improved interval-based clock synchronization in sensor networks. IPSN 2004: 349-358 |
74 | ![]() ![]() ![]() ![]() ![]() ![]() | Marcel Verhoef, Ernesto Wandeler, Lothar Thiele, Paul Lieverse: System Architecture Evaluation Using Modular Performance Analysis - A Case Study. ISoLA (Preliminary proceedings) 2004: 209-219 |
73 | ![]() ![]() ![]() ![]() ![]() ![]() | Lennart Meier, Philipp Blum, Lothar Thiele: Internal synchronization of drift-constraint clocks in ad-hoc sensor networks. MobiHoc 2004: 90-97 |
72 | ![]() ![]() ![]() ![]() ![]() ![]() | Alexander Maxiaguine, Samarjit Chakraborty, Simon Künzli, Lothar Thiele: Evaluating Schedulers for Multimedia Processing on Buffer-Constrained SoC Platforms. IEEE Design & Test of Computers 21(5): 368-377 (2004) |
71 | ![]() ![]() ![]() ![]() ![]() ![]() | Urs Anliker, Jan Beutel, Matthias Dyer, Rolf Enzler, Paul Lukowicz, Lothar Thiele, Gerhard Tröster: A Systematic Approach to the Design of Distributed Wearable Systems. IEEE Trans. Computers 53(8): 1017-1033 (2004) |
70 | ![]() ![]() ![]() ![]() ![]() ![]() | Marco Laumanns, Lothar Thiele, Eckart Zitzler: Running time analysis of multiobjective evolutionary algorithms on pseudo-Boolean functions. IEEE Trans. Evolutionary Computation 8(2): 170-182 (2004) |
69 | ![]() ![]() ![]() ![]() ![]() ![]() | Marco Laumanns, Lothar Thiele, Eckart Zitzler: Running time analysis of evolutionary algorithms on a simplified multiobjective knapsack problem. Natural Computing 3(1): 37-51 (2004) |
68 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele, Reinhard Wilhelm: Design for Timing Predictability. Real-Time Systems 28(2-3): 157-177 (2004) |
2003 | ||
67 | ![]() ![]() ![]() ![]() ![]() ![]() | Carlos M. Fonseca, Peter J. Fleming, Eckart Zitzler, Kalyanmoy Deb, Lothar Thiele: Evolutionary Multi-Criterion Optimization, Second International Conference, EMO 2003, Faro, Portugal, April 8-11, 2003, Proceedings Springer 2003 |
66 | ![]() ![]() ![]() ![]() ![]() ![]() | Samarjit Chakraborty, Simon Künzli, Lothar Thiele: A General Framework for Analysing System Properties in Platform-Based Embedded System Designs. DATE 2003: 10190-10195 |
65 | ![]() ![]() ![]() ![]() ![]() ![]() | Stefan Bleuler, Marco Laumanns, Lothar Thiele, Eckart Zitzler: PISA: A Platform and Programming Language Independent Interface for Search Algorithms. EMO 2003: 494-508 |
64 | ![]() ![]() ![]() ![]() ![]() ![]() | Christoph Steiger, Herbert Walder, Marco Platzner, Lothar Thiele: Online Scheduling and Placement of Real-time Tasks to Partially Reconfigurable Devices. RTSS 2003: 224-235 |
63 | ![]() ![]() ![]() ![]() ![]() ![]() | Samarjit Chakraborty, Simon Künzli, Lothar Thiele, Andreas Herkersdorf, Patricia Sagmeister: Performance evaluation of network processor architectures: combining simulation with analytical estimation. Computer Networks 41(5): 641-665 (2003) |
62 | ![]() ![]() ![]() ![]() ![]() ![]() | Eckart Zitzler, Lothar Thiele, Marco Laumanns, Carlos M. Fonseca, Viviane Grunert da Fonseca: Performance assessment of multiobjective optimizers: an analysis and review. IEEE Trans. Evolutionary Computation 7(2): 117-132 (2003) |
61 | ![]() ![]() ![]() ![]() ![]() ![]() | Christian Plessl, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, Lothar Thiele, Gerhard Tröster: The case for reconfigurable hardware in wearable computing. Personal and Ubiquitous Computing 7(5): 299-308 (2003) |
2002 | ||
60 | ![]() ![]() ![]() ![]() ![]() ![]() | Samarjit Chakraborty, Thomas Erlebach, Simon Künzli, Lothar Thiele: Schedulability of event-driven code blocks in real-time embedded systems. DAC 2002: 616-621 |
59 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele, Samarjit Chakraborty, Matthias Gries, Simon Künzli: A framework for evaluating design tradeoffs in packet processing architectures. DAC 2002: 880-885 |
58 | ![]() ![]() ![]() ![]() ![]() ![]() | Jürgen Teich, Lothar Thiele: Exact Partitioning of Affine Dependence Algorithms. Embedded Processor Design Challenges 2002: 135-153 |
57 | ![]() ![]() ![]() ![]() ![]() ![]() | Marco Laumanns, Lothar Thiele, Eckart Zitzler, Kalyanmoy Deb: Archiving With Guaranteed Convergence And Diversity In Multi-objective Optimization. GECCO 2002: 439-447 |
56 | ![]() ![]() ![]() ![]() ![]() ![]() | Eckart Zitzler, Marco Laumanns, Lothar Thiele, Carlos M. Fonseca, Viviane Grunert da Fonseca: Why Quality Assessment Of Multiobjective Optimizers Is Difficult. GECCO 2002: 666-674 |
55 | ![]() ![]() ![]() ![]() ![]() ![]() | Samarjit Chakraborty, Matthias Gries, Lothar Thiele: Supporting a Low Delay Best-Effort Class in the Presence of Real-Time Traffic. IEEE Real Time Technology and Applications Symposium 2002: 45-54 |
54 | ![]() ![]() ![]() ![]() ![]() ![]() | Samarjit Chakraborty, Simon Künzli, Lothar Thiele: Approximate Schedulability Analysis. IEEE Real-Time Systems Symposium 2002: 159-168 |
53 | ![]() ![]() ![]() ![]() ![]() ![]() | Christian Plessl, Rolf Enzler, Herbert Walder, Jan Beutel, Marco Platzner, Lothar Thiele: Reconfigurable Hardware in Wearable Computing Nodes. ISWC 2002: 215-222 |
52 | ![]() ![]() ![]() ![]() ![]() ![]() | Marco Laumanns, Lothar Thiele, Eckart Zitzler, Emo Welzl, Kalyanmoy Deb: Running Time Analysis of Multi-objective Evolutionary Algorithms on a Simple Discrete Optimization Problem. PPSN 2002: 44-53 |
51 | ![]() ![]() ![]() ![]() ![]() ![]() | Marco Laumanns, Lothar Thiele, Kalyanmoy Deb, Eckart Zitzler: Combining Convergence and Diversity in Evolutionary Multiobjective Optimization. Evolutionary Computation 10(3): 263-282 (2002) |
50 | ![]() ![]() ![]() ![]() ![]() ![]() | Dirk Ziegenbein, Kai Richter, Rolf Ernst, Lothar Thiele, Jürgen Teich: SPI - a system model for heterogeneously specified embedded systems. IEEE Trans. VLSI Syst. 10(4): 379-389 (2002) |
2001 | ||
49 | ![]() ![]() ![]() ![]() ![]() ![]() | Eckart Zitzler, Kalyanmoy Deb, Lothar Thiele, Carlos A. Coello Coello, David Corne: Evolutionary Multi-Criterion Optimization, First International Conference, EMO 2001, Zurich, Switzerland, March 7-9, 2001, Proceedings Springer 2001 |
48 | ![]() ![]() ![]() ![]() ![]() ![]() | Marco Laumanns, Eckart Zitzler, Lothar Thiele: On the Effects of Archiving, Elitism, and Density Based Selection in Evolutionary Multi-objective Optimization. EMO 2001: 181-196 |
47 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele, Samarjit Chakraborty, Matthias Gries, Alexander Maxiaguine, Jonas Greutert: Embedded Software in Network Processors - Models and Algorithms. EMSOFT 2001: 416-434 |
46 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele: Integral Design Representations for Embedded Systems. ICCAD 2001: 264 |
45 | ![]() ![]() ![]() ![]() ![]() ![]() | Samarjit Chakraborty, Thomas Erlebach, Lothar Thiele: On the Complexity of Scheduling Conditional Real-Time Code. WADS 2001: 38-49 |
44 | ![]() ![]() ![]() ![]() ![]() ![]() | Karsten Strehl, Lothar Thiele, Matthias Gries, Dirk Ziegenbein, Rolf Ernst, Jürgen Teich: FunState-an internal design representation for codesign. IEEE Trans. VLSI Syst. 9(4): 524-544 (2001) |
43 | ![]() ![]() ![]() ![]() ![]() ![]() | Matthias Anlauff, Samarjit Chakraborty, Philipp W. Kutter, Alfonso Pierantonio, Lothar Thiele: Generating an action notation environment from Montages descriptions. STTT 3(4): 431-455 (2001) |
2000 | ||
42 | ![]() ![]() ![]() ![]() ![]() ![]() | Yuri Gurevich, Philipp W. Kutter, Martin Odersky, Lothar Thiele: Abstract State Machines, Theory and Applications, International Workshop, ASM 2000, Monte Verità, Switzerland, March 19-24, 2000, Proceedings Springer 2000 |
41 | ![]() ![]() ![]() ![]() ![]() ![]() | Eckart Zitzler, Kalyanmoy Deb, Lothar Thiele: Comparison of Multiobjective Evolutionary Algorithms: Empirical Results. Evolutionary Computation 8(2): 173-195 (2000) |
40 | ![]() ![]() ![]() ![]() ![]() ![]() | Michael Eisenring, Lothar Thiele, Eckart Zitzler: Conflicting Criteria in Embedded System Design. IEEE Design & Test of Computers 17(2): 51-59 (2000) |
39 | ![]() ![]() ![]() ![]() ![]() ![]() | Karsten Strehl, Lothar Thiele: Interval diagrams for efficient symbolic verification of processnetworks. IEEE Trans. on CAD of Integrated Circuits and Systems 19(8): 939-956 (2000) |
38 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele, Jürgen Teich, Karsten Strehl: Regular state machines. Parallel Algorithms Appl. 15(3-4): 265-300 (2000) |
1999 | ||
37 | ![]() ![]() ![]() ![]() ![]() ![]() | Karsten Strehl, Lothar Thiele, Dirk Ziegenbein, Rolf Ernst, Jürgen Teich: Scheduling hardware/software systems using symbolic techniques. CODES 1999: 173-177 |
36 | ![]() ![]() ![]() ![]() ![]() ![]() | Kai Richter, Dirk Ziegenbein, Rolf Ernst, Lothar Thiele, Jürgen Teich: Representation of Function Variants for Embedded System Optimization and Synthesis. DAC 1999: 517-522 |
35 | ![]() ![]() ![]() ![]() ![]() ![]() | Karsten Strehl, Lothar Thiele: Interval Diagram Techniques for Symbolic Model Checking of Petri Nets. DATE 1999: 756-757 |
34 | ![]() ![]() ![]() ![]() ![]() ![]() | Michael Eisenring, Marco Platzner, Lothar Thiele: Communication Synthesis for Reconfigurable Embedded Systems. FPL 1999: 205-214 |
33 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele, Karsten Strehl, Dirk Ziegenbein, Rolf Ernst, Jürgen Teich: FunState - an internal design representation for codesign. ICCAD 1999: 558-565 |
32 | ![]() ![]() ![]() ![]() ![]() ![]() | Uwe Schwiegelshohn, Lothar Thiele: Dynamic Min-Max Problems. Discrete Event Dynamic Systems 9(2): 111-134 (1999) |
31 | ![]() ![]() ![]() ![]() ![]() ![]() | Eckart Zitzler, Lothar Thiele: Multiobjective evolutionary algorithms: a comparative case study and the strength Pareto approach. IEEE Trans. Evolutionary Computation 3(4): 257-271 (1999) |
1998 | ||
30 | ![]() ![]() ![]() ![]() ![]() ![]() | Dirk Ziegenbein, Rolf Ernst, Kai Richter, Jürgen Teich, Lothar Thiele: Combining multiple models of computation for scheduling and allocation. CODES 1998: 9-13 |
29 | ![]() ![]() ![]() ![]() ![]() ![]() | Philipp W. Kutter, Daniel Schweizer, Lothar Thiele: Integrating Domain Specific Language Design in the Software Life Cycle. FM-Trends 1998: 196-212 |
28 | ![]() ![]() ![]() ![]() ![]() ![]() | Dirk Ziegenbein, Kai Richter, Rolf Ernst, Jürgen Teich, Lothar Thiele: Representation of process mode correlation for scheduling. ICCAD 1998: 54-61 |
27 | ![]() ![]() ![]() ![]() ![]() ![]() | Karsten Strehl, Lothar Thiele: Symbolic model checking of process networks using interval diagram techniques. ICCAD 1998: 686-692 |
26 | ![]() ![]() ![]() ![]() ![]() ![]() | Eckart Zitzler, Lothar Thiele: Multiobjective Optimization Using Evolutionary Algorithms - A Comparative Case Study. PPSN 1998: 292-304 |
25 | ![]() ![]() ![]() ![]() ![]() ![]() | Christian Heckler, Lothar Thiele: Complexity Analysis of a Parallel Lattice Basis Reduction Algorithm. SIAM J. Comput. 27(5): 1295-1302 (1998) |
1997 | ||
24 | ![]() ![]() ![]() ![]() ![]() ![]() | Jürgen Teich, Tobias Blickle, Lothar Thiele: An evolutionary approach to system-level synthesis. CODES 1997: 167-172 |
23 | ![]() ![]() ![]() ![]() ![]() ![]() | Uwe Schwiegelshohn, Lothar Thiele: Periodic and Non-periodic Min-Max Equations. ICALP 1997: 379-389 |
22 | ![]() ![]() ![]() ![]() ![]() ![]() | Jürgen Teich, Lothar Thiele, Sundararajan Sriram, Michael Martin: Performance analysis and optimization of mixed asynchronous synchronous systems. IEEE Trans. on CAD of Integrated Circuits and Systems 16(5): 473-484 (1997) |
21 | ![]() ![]() ![]() ![]() ![]() ![]() | Jürgen Teich, Lothar Thiele, Lee Z. Zhang: Partitioning Processor Arrays under Resource Constraints. VLSI Signal Processing 17(1): 5-20 (1997) |
1996 | ||
20 | ![]() ![]() ![]() ![]() ![]() ![]() | Jürgen Teich, Lothar Thiele, Li Zhang: Scheduling of Partitioned Regular Algorithms on Processor Arrays with Constrained Resources. ASAP 1996: 131-144 |
19 | ![]() ![]() ![]() ![]() ![]() ![]() | Jean-Paul Theis, Lothar Thiele: VLIW-Processors under Periodic Real Time Constraints. ICCD 1996: 191- |
18 | ![]() ![]() ![]() ![]() ![]() ![]() | Tobias Blickle, Lothar Thiele: A Comparison of Selection Schemes used in Evolutionary Algorithms. Evolutionary Computation 4(4): 361-394 (1996) |
1995 | ||
17 | ![]() ![]() ![]() ![]() ![]() ![]() | Jean-Paul Theis, Lothar Thiele: POM: a processor model for image processing. ICCD 1995: 326-331 |
16 | ![]() ![]() ![]() ![]() ![]() ![]() | Tobias Blickle, Lothar Thiele: A Mathematical Analysis of Tournament Selection. ICGA 1995: 9-16 |
15 | ![]() ![]() ![]() ![]() ![]() ![]() | Jürgen Teich, Lothar Thiele, Edward A. Lee: Modeling and simulation of heterogeneous real-time systems based on a deterministic discrete event model. ISSS 1995: 156-161 |
14 | ![]() ![]() ![]() ![]() ![]() ![]() | Joachim König, Lothar Thiele: Algorithm-architecture co-design by example: a coprocessor for on-line arithmetic. Microprocessing and Microprogramming 41(5-6): 339-357 (1995) |
13 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele: Resource constrained scheduling of uniform algorithms. VLSI Signal Processing 10(3): 295-310 (1995) |
1994 | ||
12 | ![]() ![]() ![]() ![]() ![]() ![]() | Francky Catthoor, Ed F. Deprettere, Yu Hen Hu, Jan M. Rabaey, Heinrich Meyr, Lothar Thiele: Is it Possible to achieve a Teraflop/s on a chip? From High Performance Algorithms to Architectures. ISCAS 1994: 129-136 |
11 | ![]() ![]() ![]() ![]() ![]() ![]() | Christian Heckler, Lothar Thiele: Computing Linear Data Dependencies in Nested Loop Programs. Parallel Processing Letters 4: 193-204 (1994) |
10 | ![]() ![]() ![]() ![]() ![]() ![]() | Lothar Thiele, Edward Chow: Guest editors' introduction. VLSI Signal Processing 8(2): 95 (1994) |
1993 | ||
9 | ![]() ![]() ![]() ![]() ![]() ![]() | Christian Heckler, Lothar Thiele: Parallel Complexitiy of Lattice Basis Reduction and a Floating-Point Parallel Algorithm. PARLE 1993: 744-747 |
8 | ![]() ![]() ![]() ![]() ![]() ![]() | Christian Heckler, Lothar Thiele: A Parallel Lattice Basis Reduction for Mesh-Connected Processor Arrays and Parallel Complexity. SPDP 1993: 400-407 |
1992 | ||
7 | ![]() ![]() ![]() ![]() ![]() ![]() | Wolfgang Backes, Uwe Schwiegelshohn, Lothar Thiele: Analysis of Free Schedule in Periodic Graphs. SPAA 1992: 333-342 |
1991 | ||
6 | ![]() ![]() ![]() ![]() ![]() ![]() | Ulrich Arzt, Daniela Merziger, Lothar Thiele: Rekursive Prozeduraufrufe in VLSI-Occam. Transputer-Anwender-Treffen 1991: 108-115 |
5 | ![]() ![]() ![]() ![]() ![]() ![]() | Jürgen Teich, Lothar Thiele: Control generation in the design of processor arrays. VLSI Signal Processing 3(1-2): 77-92 (1991) |
1989 | ||
4 | ![]() ![]() ![]() ![]() ![]() ![]() | Uwe Schwiegelshohn, Lothar Thiele: Linear Systolic Arrays for Matrix Comutations. J. Parallel Distrib. Comput. 7(1): 28-39 (1989) |
1988 | ||
3 | ![]() ![]() ![]() ![]() ![]() ![]() | Uwe Schwiegelshohn, Lothar Thiele: A Systolic Array for the Assignment Problem. IEEE Trans. Computers 37(11): 1422-1425 (1988) |
1987 | ||
2 | ![]() ![]() ![]() ![]() ![]() ![]() | Uwe Schwiegelshohn, Lothar Thiele: A Systolic Array for Cyclic-by-Rows Jacobi Algorithms. J. Parallel Distrib. Comput. 4(3): 334-340 (1987) |
1986 | ||
1 | ![]() ![]() ![]() ![]() ![]() ![]() | Uwe Schwiegelshohn, Lothar Thiele: On the Systolic Detection of Shortest Routes. ICPP 1986: 762-764 |