| 2007 |
32 | | Guido Stehr,
Helmut E. Graeb,
Kurt Antreich:
Analog Performance Space Exploration by Normal-Boundary Intersection and by Fourier-Motzkin Elimination.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(10): 1733-1748 (2007) |
| 2004 |
31 | | Guido Stehr,
Helmut E. Graeb,
Kurt Antreich:
Analog performance space exploration by Fourier-Motzkin elimination with application to hierarchical sizing.
ICCAD 2004: 847-854 |
| 2003 |
30 | | Guido Stehr,
Helmut E. Graeb,
Kurt Antreich:
Performance trade-off analysis of analog circuits by normal-boundary intersection.
DAC 2003: 958-963 |
29 | | Guido Stehr,
Michael Pronath,
Frank Schenkel,
Helmut E. Graeb,
Kurt Antreich:
Initial Sizing of Analog Integrated Circuits by Centering Within Topology-Given Implicit Specification.
ICCAD 2003: 241-246 |
| 2002 |
28 | | Alfred Kölbl,
James H. Kukula,
Kurt Antreich,
Robert F. Damiano:
Handling special constructs in symbolic simulation.
DAC 2002: 105-110 |
27 | | Michael Pronath,
Helmut E. Graeb,
Kurt Antreich:
A Test Design Method for Floating Gate Defects (FGD) in Analog Integrated Circuits.
DATE 2002: 78-83 |
| 2001 |
26 | | Frank Schenkel,
Michael Pronath,
Stephan Zizala,
Robert Schwencker,
Helmut E. Graeb,
Kurt Antreich:
Mismatch Analysis and Direct Yield Optimization by Spec-Wise Linearization and Feasibility-Guided Search.
DAC 2001: 858-863 |
25 | | Helmut E. Graeb,
Stephan Zizala,
Josef Eckmueller,
Kurt Antreich:
The Sizing Rules Method for Analog Integrated Circuit Design.
ICCAD 2001: 343-349 |
| 2000 |
24 | | Robert Schwencker,
Frank Schenkel,
Helmut E. Graeb,
Kurt Antreich:
The Generalized Boundary Curve-A Common Method for Automatic Nominal Design and Design Centering of Analog Circuits.
DATE 2000: 42-47 |
23 | | Paul Tafertshofer,
Andreas Ganz,
Kurt Antreich:
IGRAINE-an Implication GRaph-bAsed engINE for fast implication, justification, and propagation.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(8): 907-927 (2000) |
| 1999 |
22 | | Robert Schwencker,
Josef Eckmueller,
Helmut E. Graeb,
Kurt Antreich:
Automating the Sizing of Analog CMOS Circuits by Consideration of Structural Constraints.
DATE 1999: 323-327 |
21 | | Bernd Wurth,
Ulf Schlichtmann,
Klaus Eckl,
Kurt Antreich:
Functional multiple-output decomposition with application to technology mapping for lookup table-based FPGAs.
ACM Trans. Design Autom. Electr. Syst. 4(3): 313-350 (1999) |
20 | | Walter M. Lindermeir,
Helmut E. Graeb,
Kurt Antreich:
Analog testing by characteristic observation inference.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(9): 1353-1368 (1999) |
| 1997 |
19 | | Kurt Antreich,
Franz J. Rammig,
Wolfgang Rosenstiel,
Detlef Schmid,
Klaus Waldschmidt:
DFG-Schwerpunktprogramm: Entwurf und Entwurfsmethodik eingebetteter Systeme.
GI Jahrestagung 1997: 93-101 |
18 | | Kurt Antreich,
Franz J. Rammig,
Wolfgang Rosenstiel,
Detlef Schmid,
Klaus Waldschmidt:
DFG-Schwerpunktprogramm: Entwurf und Entwurfsmethodik eingebetteter Systeme.
Inform., Forsch. Entwickl. 12(4): 220-223 (1997) |
17 | | Peter A. Krauss,
Andreas Ganz,
Kurt Antreich:
Distributed Test Pattern Generation for Stuck-At Faults in Sequential Circuits.
J. Electronic Testing 11(3): 227-245 (1997) |
| 1995 |
16 | | Bernd Wurth,
Klaus Eckl,
Kurt Antreich:
Functional Multiple-Output Decomposition: Theory and an Implicit Algorithm.
DAC 1995: 54-59 |
15 | | Bernhard Rohfleisch,
Bernd Wurth,
Kurt Antreich:
Logic Clause Analysis for Delay Optimization.
DAC 1995: 668-672 |
14 | | Manfred Henftling,
Hannes C. Wittmann,
Kurt Antreich:
A formal non-heuristic ATPG approach.
EURO-DAC 1995: 248-253 |
13 | | Manfred Henftling,
Hannes C. Wittmann,
Kurt Antreich:
A single-path-oriented fault-effect propagation in digital circuits considering multiple-path sensitization.
ICCAD 1995: 304-309 |
12 | | Walter M. Lindermeir,
Helmut E. Graeb,
Kurt Antreich:
Design based analog testing by Characteristic Observation Inference.
ICCAD 1995: 620-626 |
| 1994 |
11 | | Manfred Henftling,
Hannes C. Wittmann,
Kurt Antreich:
Path Hashing to Accelerate Delay Fault Simulation.
DAC 1994: 522-526 |
10 | | Peter H. Schneider,
Kurt Antreich,
Ulf Schlichtmann:
A new power estimation technique with application to decomposition of Boolean functions for low power.
EURO-DAC 1994: 388-393 |
9 | | Henning Spruth,
Frank M. Johannes,
Kurt Antreich:
PHIroute: A Parallel Hierarchical Sea-of-Gates Router.
ISCAS 1994: 487-490 |
8 | | Kurt Antreich,
Helmut E. Graeb,
Claudia U. Wieser:
Circuit analysis and optimization driven by worst-case distances.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(1): 57-71 (1994) |
7 | | Konrad Doll,
Frank M. Johannes,
Kurt Antreich:
Iterative placement improvement by network flow methods.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(10): 1189-1200 (1994) |
| 1993 |
6 | | Helmut E. Graeb,
Claudia U. Wieser,
Kurt Antreich:
Improved Methods for Worst-Case Analysis and Optimization Incorporating Operating Tolerances.
DAC 1993: 142-147 |
5 | | Peter A. Krauss,
Kurt Antreich:
Application of Fault Parallelism to the Automatic Test Pattern Generation for Sequential Circuits.
Parallel Computer Architectures 1993: 234-245 |
| 1991 |
4 | | Kurt Antreich,
Helmut E. Graeb:
Circuit Optimization Driven by Worst-Case Distances.
ICCAD 1991: 166-169 |
3 | | Jürgen M. Kleinhans,
Georg Sigl,
Frank M. Johannes,
Kurt Antreich:
GORDIAN: VLSI placement by quadratic programming and slicing optimization.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(3): 356-365 (1991) |
| 1990 |
2 | | Thomas H. Krodel,
Kurt Antreich:
An accurate model for ambiguity delay simulation.
EURO-DAC 1990: 563-567 |
| 1987 |
1 | | Kurt Antreich,
Michael H. Schulz:
Accelerated Fault Simulation and Fault Grading in Combinational Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 6(5): 704-712 (1987) |