2009 | ||
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71 | Michael DeBole, Krishnan Ramakrishnan, Varsha Balakrishnan, Wenping Wang, Hong Luo, Yu Wang, Yuan Xie, Yu Cao, Narayanan Vijaykrishnan: A framework for estimating NBTI degradation of microarchitectural components. ASP-DAC 2009: 455-460 | |
70 | Yun Ye, Frank Liu, Min Chen, Yu Cao: Variability analysis under layout pattern-dependent rapid-thermal annealing process. DAC 2009: 551-556 | |
69 | Yu Wang, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang: Gate replacement techniques for simultaneous leakage and aging optimization. DATE 2009: 328-333 | |
68 | Shih-Hsi Liu, Yu Cao, Yili Li, Ming Li, Sanqing Hu: Semantic Image Classification for Medical Videos. ICSC 2009: 648-653 | |
67 | Xiaoming Chen, Yu Wang, Yu Cao, Yuchun Ma, Huazhong Yang: Variation-aware supply voltage assignment for minimizing circuit degradation and leakage. ISLPED 2009: 39-44 | |
66 | Yu Wang, Xiaoming Chen, Wenping Wang, Varsha Balakrishnan, Yu Cao, Yuan Xie, Huazhong Yang: On the efficacy of input Vector Control to mitigate NBTI effects and leakage power. ISQED 2009: 19-26 | |
65 | Yu Cao, Asha Balijepalli, Saurabh Sinha, Chi-Chao Wang, Wenping Wang, Wei Zhao: The Predictive Technology Model in the Late Silicon Era and Beyond. Foundations and Trends in Electronic Design Automation 3(4): 305-401 (2009) | |
64 | Yu Cao, Jim Tschanz, Pradip Bose: Guest Editors' Introduction: Reliability Challenges in Nano-CMOS Design. IEEE Design & Test of Computers 26(6): 6-7 (2009) | |
63 | Michael DeBole, Krishnan Ramakrishnan, Varsha Balakrishnan, Wenping Wang, Hong Luo, Yu Wang, Yuan Xie, Yu Cao, Narayanan Vijaykrishnan: New-Age: A Negative Bias Temperature Instability-Estimation Framework for Microarchitectural Components. International Journal of Parallel Programming 37(4): 417-431 (2009) | |
2008 | ||
62 | Anupama R. Subramaniam, Ritu Singhal, Chi-Chao Wang, Yu Cao: Design rule optimization of regular layout for leakage reduction in nanoscale design. ASP-DAC 2008: 474-479 | |
61 | Yun Ye, Frank Liu, Sani R. Nassif, Yu Cao: Statistical modeling and simulation of threshold variation under dopant fluctuations and line-edge roughness. DAC 2008: 900-905 | |
60 | Steve Read, Yu Cao, Hazel Antaramian-Hofman: Mining the Royal Portrait Miniature for the Art Historical Context. ICNSC 2008: 1358-1361 | |
59 | Yu Cao, Steve Read, Sachin Raka, Revanth Nandamuri: A Theoretic Framework for Object Class Tracking. ICNSC 2008: 1362-1365 | |
58 | Yu Cao, Sung Baang, Shih-Hsi Liu, Ming Li, Sanqing Hu: Audio-visual event classification via spatial-temporal-audio words. ICPR 2008: 1-5 | |
57 | Yu Cao, Shih-Hsi Liu, Ming Li, Sung Baang, Sanqing Hu: Medical Video Event Classification Using Shared Features. ISM 2008: 266-273 | |
56 | Shih-Hsi Liu, Yu Cao, Ming Li, Pranay Kilaru, Thell Smith, Shaen Toner: A Semantics- and Data-Driven SOA for Biomedical Multimedia Systems. ISM 2008: 533-538 | |
55 | Xin Li, Yu Cao: Projection-Based Piecewise-Linear Response Surface Modeling for Strongly Nonlinear VLSI Performance Variations. ISQED 2008: 108-113 | |
54 | Saurabh Sinha, Asha Balijepalli, Yu Cao: A Simplified Model of Carbon Nanotube Transistor with Applications to Analog and Digital Design. ISQED 2008: 502-507 | |
53 | Dinesh Ganesan, Alexander V. Mitev, Janet Meiling Wang, Yu Cao: Finite-Point Gate Model for Fast Timing and Power Analysis. ISQED 2008: 657-662 | |
52 | Wenping Wang, Shengqi Yang, Yu Cao: Node Criticality Computation for Circuit Timing Analysis and Optimization under NBTI Effect. ISQED 2008: 763-768 | |
51 | Yu Cao, Gopal C. Das, Chee Yong Chan, Kian-Lee Tan: Optimizing complex queries with multiple relation instances. SIGMOD Conference 2008: 525-538 | |
50 | Todd M. Austin, Valeria Bertacco, Scott A. Mahlke, Yu Cao: Reliable Systems on Unreliable Fabrics. IEEE Design & Test of Computers 25(4): 322-332 (2008) | |
2007 | ||
49 | Tarun Sairam, Wei Zhao, Yu Cao: Optimizing finfet technology for high-speed and low-power design. ACM Great Lakes Symposium on VLSI 2007: 73-77 | |
48 | Wenping Wang, Shengqi Yang, Sarvesh Bhardwaj, Rakesh Vattikonda, Sarma B. K. Vrudhula, Frank Liu, Yu Cao: The Impact of NBTI on the Performance of Combinational and Sequential Circuits. DAC 2007: 364-369 | |
47 | Ritu Singhal, Asha Balijepalli, Anupama R. Subramaniam, Frank Liu, Sani R. Nassif, Yu Cao: Modeling and Analysis of Non-Rectangular Gate for Post-Lithography Circuit Simulation. DAC 2007: 823-828 | |
46 | Min Chen, Wei Zhao, Frank Liu, Yu Cao: Fast statistical circuit analysis with finite-point based transistor model. DATE 2007: 1391-1396 | |
45 | Yu Cao, Colin C. McAndrew: MOSFET modeling for 45nm and beyond. ICCAD 2007: 638-643 | |
44 | Alexander V. Mitev, Dinesh Ganesan, Dheepan Shanmugasundaram, Yu Cao, Janet Meiling Wang: A robust finite-point based gate model considering process variations. ICCAD 2007: 692-697 | |
43 | Wenping Wang, Zile Wei, Shengqi Yang, Yu Cao: An efficient method to identify critical gates under circuit aging. ICCAD 2007: 735-740 | |
42 | Asha Balijepalli, Saurabh Sinha, Yu Cao: Compact modeling of carbon nanotube transistor for early stage process-design exploration. ISLPED 2007: 2-7 | |
41 | Asha Balijepalli, Joseph Ervin, Yu Cao, Trevor Thornton: Compact Modeling of a PD SOI MESFET for Wide Temperature Designs. ISQED 2007: 133-138 | |
40 | Rakesh Vattikonda, Yansheng Luo, Alex Gyure, Xiaoning Qi, Sam C. Lo, Mahmoud Shahram, Yu Cao, Kishore Singhal, Dino Toffolon: A New Simulation Method for NBTI Analysis in SPICE Environment. ISQED 2007: 41-46 | |
39 | Danyu Liu, Yu Cao, Kihwan Kim, Sean Stanek, Bancha Doungratanaex-Chai, Kungen Lin, Wallapak Tavanapong, Johnny S. Wong, Jung-Hwan Oh, Piet C. de Groen: Arthemis: Annotation software in an integrated capturing and analysis system for colonoscopy. Computer Methods and Programs in Biomedicine 88(2): 152-163 (2007) | |
38 | Yu Cao, Lawrence T. Clark: Mapping Statistical Process Variations Toward Circuit Performance Variability: An Analytical Modeling Approach. IEEE Trans. on CAD of Integrated Circuits and Systems 26(10): 1866-1873 (2007) | |
37 | Wei Zhao, Yu Cao: Predictive technology model for nano-CMOS design exploration. JETC 3(1): (2007) | |
2006 | ||
36 | Derong Shen, Ge Yu, Tiezheng Nie, Yue Kou, Yu Cao, Meifang Li: An Effective Service Discovery Model for Highly Reliable Web Services Composition in a Specific Domain. APWeb 2006: 886-892 | |
35 | Sarvesh Bhardwaj, Yu Cao, Sarma B. K. Vrudhula: Statistical leakage minimization through joint selection of gate sizes, gate lengths and threshold voltage. ASP-DAC 2006: 953-958 | |
34 | Rakesh Vattikonda, Wenping Wang, Yu Cao: Modeling and minimization of PMOS NBTI effect for robust nanometer design. DAC 2006: 1047-1052 | |
33 | Sarvesh Bhardwaj, Sarma B. K. Vrudhula, Praveen Ghanta, Yu Cao: Modeling of intra-die process variations for accurate analysis and optimization of nano-scale circuits. DAC 2006: 791-796 | |
32 | Brian Cline, Kaviraj Chopra, David Blaauw, Yu Cao: Analysis and modeling of CD variation for statistical static timing. ICCAD 2006: 60-66 | |
31 | Shoujue Wang, Yi Huang, Yu Cao: Study on Text-Dependent Speaker Recognition Based on Biomimetic Pattern Recognition. ISNN (2) 2006: 158-164 | |
30 | Shoujue Wang, Yu Cao, Yi Huang: High-Dimensional Space Geometrical Informatics and Its Applications to Image Restoration. ISNN (2) 2006: 569-574 | |
29 | Min Chen, Yu Cao: Analysis of Pulse Signaling for Low-Power On-Chip Global Bus Design. ISQED 2006: 401-406 | |
28 | Wei Zhao, Yu Cao: New Generation of Predictive Technology Model for Sub-45nm Design Exploration. ISQED 2006: 585-590 | |
27 | Sarvesh Bhardwaj, Yu Cao, Sarma B. K. Vrudhula: LOTUS: Leakage Optimization under Timing Uncertainty for Standard-cell designs. ISQED 2006: 717-722 | |
26 | Sarvesh Bhardwaj, Yu Cao, Sarma B. K. Vrudhula: Statistical Leakage Minimization of Digital Circuits Using Gate Sizing, Gate Length Biasing, Threshold Voltage Selection. J. Low Power Electronics 2(2): 240-250 (2006) | |
25 | Huifang Qin, Rakesh Vattikonda, Thuan Trinh, Yu Cao, Jan M. Rabaey: SRAM Cell Optimization for Ultra-Low Power Standby. J. Low Power Electronics 2(3): 401-411 (2006) | |
2005 | ||
24 | Sae Hwang, Jung-Hwan Oh, JeongKyu Lee, Yu Cao, Wallapak Tavanapong, Danyu Liu, Johnny Wong, Piet C. de Groen: Automatic measurement of quality metrics for colonoscopy videos. ACM Multimedia 2005: 912-921 | |
23 | Derong Shen, Ge Yu, Yu Cao, Yue Kou, Tiezheng Nie: An Effective Web Services Discovery Strategy for Web Services Composition. CIT 2005: 257-263 | |
22 | Yu Cao, Lawrence T. Clark: Mapping statistical process variations toward circuit performance variability: an analytical modeling approach. DAC 2005: 658-663 | |
21 | Jinhui Chen, Lawrence T. Clark, Yu Cao: Robust Design of High Fan-In/Out Subthreshold Circuits. ICCD 2005: 405-410 | |
20 | Paul Friedberg, Yu Cao, Jason Cain, Ruth Wang, Jan M. Rabaey, Costas J. Spanos: Modeling Within-Die Spatial Correlation Effects for Process-Design Co-Optimization. ISQED 2005: 516-521 | |
19 | Yu Cao, Xuejue Huang, Dennis Sylvester, Tsu-Jae King, Chenming Hu: Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design. IEEE Trans. VLSI Syst. 13(1): 158-162 (2005) | |
18 | Yu Cao, Xiao-dong Yang, Xuejue Huang, Dennis Sylvester: Switch-factor based loop RLC modeling for efficient timing analysis. IEEE Trans. VLSI Syst. 13(9): 1072-1078 (2005) | |
17 | Huifang Qin, Yu Cao, Dejan Markovic, Andrei Vladimirescu, Jan M. Rabaey: Standby supply voltage minimization for deep sub-micron SRAM. Microelectronics Journal 36(9): 789-800 (2005) | |
2004 | ||
16 | Yu Cao, Dalei Li, Wallapak Tavanapong, Jung-Hwan Oh, Johnny Wong, Piet C. de Groen: Parsing and browsing tools for colonoscopy videos. ACM Multimedia 2004: 844-851 | |
15 | Yu Cao, Wallapak Tavanapong, Dalei Li, Jung-Hwan Oh, Piet C. de Groen, Johnny S. Wong: A Visual Model Approach for Parsing Colonoscopy Videos. CIVR 2004: 160-169 | |
14 | Yu Cao, Wallapak Tavanapong, Kihwan Kim, Johnny Wong, Jung-Hwan Oh, Piet C. de Groen: A framework for parsing colonoscopy videos for semantic units. ICME 2004: 1879-1882 | |
13 | Zile Wei, Yu Cao, A. Richard Newton: Digital Image Restoration by Exposure-Splitting and Registration. ICPR (4) 2004: 657-660 | |
12 | Jie Bao, Yu Cao, Wallapak Tavanapong, Vasant Honavar: Integration of Domain-Specific and Domain-Independent Ontologies for Colonoscopy Video Database Annotation. IKE 2004: 82-90 | |
11 | Huifang Qin, Yu Cao, Dejan Markovic, Andrei Vladimirescu, Jan M. Rabaey: SRAM Leakage Suppression by Minimizing Standby Supply Voltage. ISQED 2004: 55-60 | |
2003 | ||
10 | Yu Cao, Wallapak Tavanapong, Kihwan Kim, Jung-Hwan Oh: Audio-Assisted Scene Segmentation for Story Browsing. CIVR 2003: 446-455 | |
9 | Yu Cao, Xiao-dong Yang, Xuejue Huang, Dennis Sylvester: Switch-Factor Based Loop RLC Modeling for Efficient Timing Analysis. ICCAD 2003: 848-854 | |
8 | Yu Cao, Chenming Hu, Xuejue Huang, Andrew B. Kahng, Igor L. Markov, Michael Oliver, Dirk Stroobandt, Dennis Sylvester: Improved a priori interconnect predictions and technology extrapolation in the GTX system. IEEE Trans. VLSI Syst. 11(1): 3-14 (2003) | |
7 | Takashi Sato, Yu Cao, Kanak Agarwal, Dennis Sylvester, Chenming Hu: Bidirectional closed-form transformation between on-chip coupling noise waveforms and interconnect delay-change curves. IEEE Trans. on CAD of Integrated Circuits and Systems 22(5): 560-572 (2003) | |
2002 | ||
6 | Kanak Agarwal, Yu Cao, Takashi Sato, Dennis Sylvester, Chenming Hu: Efficient Generation of Delay Change Curves for Noise-Aware Static Timing Analysis. VLSI Design 2002: 77- | |
5 | Yu Cao, Xuejue Huang, N. H. Chang, Shen Lin, O. Sam Nakagawa, Weize Xie, Dennis Sylvester, Chenming Hu: Effective on-chip inductance modeling for multiple signal lines and application to repeater insertion. IEEE Trans. VLSI Syst. 10(6): 799-805 (2002) | |
2001 | ||
4 | Yu Cao, Xuejue Huang, Chenming Hu, Norman Chang, Shen Lin, O. Sam Nakagawa, Weize Xie: Effective On-chip Inductance Modeling for Multiple Signal Lines and Application on Repeater Insertion. ISQED 2001: 185-190 | |
2000 | ||
3 | Andrew E. Caldwell, Yu Cao, Andrew B. Kahng, Farinaz Koushanfar, Hua Lu, Igor L. Markov, Michael Oliver, Dirk Stroobandt, Dennis Sylvester: GTX: the MARCO GSRC technology extrapolation system. DAC 2000: 693-698 | |
2 | Yu Cao, Chenming Hu, Xuejue Huang, Andrew B. Kahng, Sudhakar Muddu, Dirk Stroobandt, Dennis Sylvester: Effects of Global Interconnect Optimizations on Performance Estimation of Deep Submicron Design. ICCAD 2000: 56-61 | |
1999 | ||
1 | Yu Cao, Paul P. B. Eggermont, Susan Terebey: Cross Burg entropy maximization and its application to ringing suppression in image reconstruction. IEEE Transactions on Image Processing 8(2): 286-292 (1999) |