Andreas Herkersdorf

	2010
45		Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf: An Application-Aware Load Balancing Strategy for Network Processors. HiPEAC 2010: 156-170
	2009
44		Zhonglei Wang, Andreas Herkersdorf: An efficient approach for system-level timing simulation of compiler-optimized embedded software. DAC 2009: 220-225
43		Zhonglei Wang, Andreas Herkersdorf, Wolfgang Haberl, Martin Wechs: SysCOLA: a framework for co-development of automotive software and system platform. DAC 2009: 37-42
42		Shadi Traboulsi, Michael Meitinger, Rainer Ohlendorf, Andreas Herkersdorf: An Efficient Hardware Architecture for Packet Re-sequencing in Network Processors MPSoCs. DSD 2009: 11-18
41		Andreas Lankes, Thomas Wild, Andreas Herkersdorf: Hierarchical NoCs for Optimized Access to Shared Memory and IO Resources. DSD 2009: 255-262
40		Zhonglei Wang, Andreas Herkersdorf: Flow Analysis on Intermediate Source Code for WCET Estimation of Compiler-Optimized Programs. RTCSA 2009: 22-27
	2008
39		Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: A Hardware Packet Re-Sequencer Unit for Network Processors. ARCS 2008: 85-97
38		Daniel Llorente, Kimon Karras, Thomas Wild, Andreas Herkersdorf: Buffer allocation for advanced packet segmentation in Network Processors. ASAP 2008: 221-226
37		Jürgen Becker, Michael Hübner, Robert Esser, Andreas Herkersdorf, Walter Stechele, Vera Lauer: Design Flows, Communication Based Design and Architectures in Automotive Electronic Systems. DATE 2008
36		Zhonglei Wang, Andreas Herkersdorf, Stefano Merenda, Michael Tautschnig: A Model Driven Development Approach for Implementing Reactive Systems in Hardware. FDL 2008: 197-202
35		Josef Angermeier, Mateusz Majer, Jürgen Teich, Lars Braun, T. Schwalb, Philipp Graf, Michael Hübner, Jürgen Becker, Enno Lübbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker: Fine grain reconfigurable architectures. FPL 2008: 348
34		Thilo Pionteck, Roman Koch, Carsten Albrecht, Erik Maehle, Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: Network processors. FPL 2008: 352
33		Andreas Herkersdorf, Walter Stechele, Christian Müller-Schloer, Hartmut Schmeck: Workshop "Adaptive and Organic Systems". GI Jahrestagung (2) 2008: 731-732
32		Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf: Learning Classifier Tables for Autonomic Systems on Chip. GI Jahrestagung (2) 2008: 771-778
31		Zhonglei Wang, Wolfgang Haberl, Andreas Herkersdorf, Martin Wechs: A Simulation Approach for Performance Validation during Embedded Systems Design. ISoLA 2008: 385-399
30		Zhonglei Wang, Antonio Sanchez, Andreas Herkersdorf: SciSim: a software performance estimation framework using source code instrumentation. WOSP 2008: 33-42
29		Rainer Ohlendorf, Michael Meitinger, Thomas Wild, Andreas Herkersdorf: A Processing Path Dispatcher in Network Processor MPSoCs. IEEE Trans. VLSI Syst. 16(10): 1335-1345 (2008)
	2007
28		Michael Meitinger, Rainer Ohlendorf, Thomas Wild, Andreas Herkersdorf: A Programmable Stream Processing Engine for Packet Manipulation in Network Processors. ISVLSI 2007: 259-264
27		Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf: Simulated and measured performance evaluation of RISC-based SoC platforms in network processing applications. Journal of Systems Architecture 53(10): 703-718 (2007)
26		Christopher Claus, Walter Stechele, Andreas Herkersdorf: Autovision - A Run-time Reconfigurable MPSoC Architecture for Future Driver Assistance Systems (Autovision - Eine zur Laufzeit rekonfigurierbare MPSoC Architektur für zukünftige Fahrerassistenzsysteme). it - Information Technology 49(3): 181- (2007)
	2006
25		Abdelmajid Bouajila, Andreas Bernauer, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Error Detection Techniques Applicable in an Architecture Framework and Design Methodology for Autonomic SoCs. BICC 2006: 107-113
24		Thomas Wild, Andreas Herkersdorf, Rainer Ohlendorf: Performance evaluation for system-on-chip architectures using trace-based transaction level simulation. DATE 2006: 248-253
23		Andreas Herkersdorf, Walter Stechele: AutoVision: flexible processor architecture for video-assisted driving. DATE 2006: 556
22		Andreas Herkersdorf, Christopher Claus, Michael Meitinger, Rainer Ohlendorf, Thomas Wild: Reconfigurable Processing Units vs. Reconfigurable Interconnects. Dynamically Reconfigurable Architectures 2006
21		Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf: An Architecture for Runtime Evaluation of SoC Reliability. GI Jahrestagung (1) 2006: 177-
20		Rainer Ohlendorf, Thomas Wild, Michael Meitinger, Holm Rauchfuss, Andreas Herkersdorf: Performance Evaluation of RISC-based SoC Platforms in Network Processing Applications. ICSAMOS 2006: 152-159
19		Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel: Organic Computing at the System on Chip Level. VLSI-SoC 2006: 338-341
	2005
18		Gabriel Mihai Lipsa, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Towards a Framework and a Design Methodology for Autonomous SoC. ARCS Workshops 2005: 101-108
17		Faisal Suleman, Dirk Eilers, Helmut Steckenbiller, Andreas Herkersdorf: Adaptable DSP Functions for Dynamically Reconfigurable Communication Systems. ARCS Workshops 2005: 19-26
16		Rainer Ohlendorf, Andreas Herkersdorf, Thomas Wild: FlexPath NP: a network processor concept with application-driven flexible processing paths. CODES+ISSS 2005: 279-284
15		Paul Zuber, Armin Windschiegl, Raúl Medina Beltán de Otálora, Walter Stechele, Andreas Herkersdorf: Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization. DATE 2005: 986-987
14		Gabriel Mihai Lipsa, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Towards a Framework and a Design Methodology for Autonomic SoC. ICAC 2005: 391-392
13		David E. Taylor, Andreas Herkersdorf, Andreas C. Döring, Gero Dittmann: Robust header compression (ROHC) in next-generation network processors. IEEE/ACM Trans. Netw. 13(4): 755-768 (2005)
	2004
12		Walter Stechele, Stephan Herrmann, Andreas Herkersdorf: Towards a Dynamically Reconfigurable System-on-Chip Platform for Video Signal Processing. ARCS Workshops 2004: 225-234
11		Carsten Albrecht, Rainer Hagenau, Erik Maehle, Andreas C. Döring, Andreas Herkersdorf: A Comparison of Parallel Programming Models of Network Processors. ARCS Workshops 2004: 390-399
10		Dirk Eilers, Helmut Steckenbiller, Andreas Herkersdorf: Buffer Schemes for Runtime Reconfiguration of Function Variants in Communication Systems. FCCM 2004: 312-315
9		Andreas Herkersdorf, Wolfgang Rosenstiel: Towards a Framework and a Design Methodology for Autonomic Integrated Systems. GI Jahrestagung (2) 2004: 610-615
	2003
8		Maria Gabrani, Gero Dittmann, Andreas C. Döring, Andreas Herkersdorf, Patricia Sagmeister, Jan van Lunteren: Design methodology for a modular service-driven network processor architecture. Computer Networks 41(5): 623-640 (2003)
7		Samarjit Chakraborty, Simon Künzli, Lothar Thiele, Andreas Herkersdorf, Patricia Sagmeister: Performance evaluation of network processor architectures: combining simulation with analytical estimation. Computer Networks 41(5): 641-665 (2003)
6		James R. Allen Jr., Brian M. Bass, Claude Basso, Richard H. Boivie, Jean Calvignac, Gordon T. Davis, Laurent Freléchoux, Marco Heddes, Andreas Herkersdorf, Andreas Kind, Joe F. Logan, Mohammad Peyravian, Mark A. Rinaldi, Ravi K. Sabhikhi, Michael S. Siegel, Marcel Waldvogel: IBM PowerNP network processor: Hardware, software, and applications. IBM Journal of Research and Development 47(2-3): 177-194 (2003)
	2002
5		John A. Darringer, Reinaldo A. Bergamaschi, Subhrajit Bhattacharya, Daniel Brand, Andreas Herkersdorf, Joseph K. Morrell, Indira Nair, Patricia Sagmeister, Youngsoo Shin: Early analysis tools for system-on-a-chip design. IBM Journal of Research and Development 46(6): 691-708 (2002)
	2000
4		Rolf Clauberg, Peter Buchmann, Andreas Herkersdorf, David J. Webb: Design Methodology for a Large Communication Chip. IEEE Design & Test of Computers 17(3): 86-94 (2000)
	1995
3		Andreas Herkersdorf, L. Heusler, Erik Maehle: Route Discovery for Multistage Fabrics in ATM Switching Nodes. Perform. Eval. 22(3): 221-238 (1995)
	1993
2		Andreas Herkersdorf, L. Heusler, Erik Maehle: Route Discovery in Multistage Switch Fabrics. Data Communication Networks and their Performance 1993: 103-118
1		Willibald A. Doeringer, Douglas Dykeman, Antonius P. J. Engbersen, Roch Guérin, Andreas Herkersdorf, L. Heusler: Fast Connection Establishment in Large-Scale Networks. INFOCOM 1993: 489-496

Coauthor Index

1	Carsten Albrecht	[11] [34]
2	James R. Allen Jr.	[6]
3	Josef Angermeier	[35]
4	Brian M. Bass	[6]
5	Claude Basso	[6]
6	Jürgen Becker	[35] [37]
7	Reinaldo A. Bergamaschi	[5]
8	Andreas Bernauer	[19] [21] [25]
9	Subhrajit Bhattacharya	[5]
10	Richard H. Boivie	[6]
11	Abdelmajid Bouajila	[19] [21] [25] [32]
12	Daniel Brand	[5]
13	Lars Braun	[35]
14	Oliver Bringmann	[14] [18] [19] [21] [25]
15	Peter Buchmann	[4]
16	Jean Calvignac	[6]
17	Samarjit Chakraborty	[7]
18	Rolf Clauberg	[4]
19	Christopher Claus	[22] [26] [35]
20	John A. Darringer	[5]
21	Gordon T. Davis	[6]
22	Gero Dittmann	[8] [13]
23	Willibald A. Doeringer	[1]
24	Andreas C. Döring	[8] [11] [13]
25	Douglas Dykeman	[1]
26	Dirk Eilers	[10] [17]
27	Antonius P. J. Engbersen	[1]
28	Robert Esser	[37]
29	Laurent Freléchoux	[6]
30	Maria Gabrani	[8]
31	Philipp Graf	[35]
32	Roch Guérin	[1]
33	Wolfgang Haberl	[31] [43]
34	Rainer Hagenau	[11]
35	Marco Heddes	[6]
36	Stephan Herrmann	[12]
37	L. Heusler	[1] [2] [3]
38	Michael Hübner	[35] [37]
39	Kimon Karras	[38]
40	Andreas Kind	[6]
41	Roman Koch	[34]
42	Simon Künzli	[7]
43	Andreas Lankes	[41]
44	Vera Lauer	[37]
45	Gabriel Mihai Lipsa	[14] [18]
46	Daniel Llorente	[38]
47	Joe F. Logan	[6]
48	Enno Lübbers	[35]
49	Jan van Lunteren	[8]
50	Erik Maehle	[2] [3] [11] [34]
51	Mateusz Majer	[35]
52	Michael Meitinger	[20] [22] [27] [28] [29] [34] [39] [42] [45]
53	Stefano Merenda	[36]
54	Renate Merker	[35]
55	Joseph K. Morrell	[5]
56	Christian Müller-Schloer	[33]
57	Indira Nair	[5]
58	Rainer Ohlendorf	[16] [20] [22] [24] [27] [28] [29] [34] [39] [42] [45]
59	Raúl Medina Beltán de Otálora	[15]
60	Mohammad Peyravian	[6]
61	Thilo Pionteck	[34]
62	Marco Platzner	[35]
63	Holm Rauchfuss	[20] [27]
64	Mark A. Rinaldi	[6]
65	Wolfgang Rosenstiel	[9] [14] [18] [19] [21] [25]
66	Markus Rullmann	[35]
67	Ravi K. Sabhikhi	[6]
68	Patricia Sagmeister	[5] [7] [8]
69	Antonio Sanchez	[30]
70	Hartmut Schmeck	[33]
71	T. Schwalb	[35]
72	Youngsoo Shin	[5]
73	Michael S. Siegel	[6]
74	Walter Stechele	[12] [14] [15] [18] [19] [21] [23] [25] [26] [32] [33] [35] [37]
75	Helmut Steckenbiller	[10] [17]
76	Faisal Suleman	[17]
77	Michael Tautschnig	[36]
78	David E. Taylor	[13]
79	Jürgen Teich	[35]
80	Lothar Thiele	[7]
81	Shadi Traboulsi	[42]
82	Marcel Waldvogel	[6]
83	Zhonglei Wang	[30] [31] [36] [40] [43] [44]
84	David J. Webb	[4]
85	Martin Wechs	[31] [43]
86	Thomas Wild	[16] [20] [22] [24] [27] [28] [29] [34] [38] [39] [41] [45]
87	Armin Windschiegl	[15]
88	Johannes Zeppenfeld	[19] [32]
89	Paul Zuber	[15]

Colors in the list of coauthors