Christos Kozyrakis
List of publications from the DBLP Bibliography Server - FAQ
2009 | ||
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66 | Hari Kannan, Michael Dalton, Christos Kozyrakis: Decoupling Dynamic Information Flow Tracking with a dedicated coprocessor. DSN 2009: 105-114 | |
65 | JaeWoong Chung, Woongki Baek, Christos Kozyrakis: Fast memory snapshot for concurrent programmingwithout synchronization. ICS 2009: 117-125 | |
64 | Richard M. Yoo, Anthony Romano, Christos Kozyrakis: Phoenix rebirth: Scalable MapReduce on a large-scale shared-memory system. IISWC 2009: 198-207 | |
63 | Amin Firoozshahian, Alex Solomatnikov, Ofer Shacham, Zain Asgar, Stephen Richardson, Christos Kozyrakis, Mark Horowitz: A memory system design framework: creating smart memories. ISCA 2009: 406-417 | |
62 | Nathan Grasso Bronson, Christos Kozyrakis, Kunle Olukotun: Feedback-directed barrier optimization in a strongly isolated STM. POPL 2009: 213-225 | |
61 | Jung Ho Ahn, Norman P. Jouppi, Christos Kozyrakis, Jacob Leverich, Robert S. Schreiber: Future scaling of processor-memory interfaces. SC 2009 | |
60 | Christos Kozyrakis, Jan-Willem van de Waerdt: Guest Editors' Introduction: Hot Chips Turns 20. IEEE Micro 29(2): 4-5 (2009) | |
59 | John K. Ousterhout, Parag Agrawal, David Erickson, Christos Kozyrakis, Jacob Leverich, David Mazières, Subhasish Mitra, Aravind Narayanan, Guru M. Parulkar, Mendel Rosenblum, Stephen M. Rumble, Eric Stratmann, Ryan Stutsman: The case for RAMClouds: scalable high-performance storage entirely in DRAM. Operating Systems Review 43(4): 92-105 (2009) | |
2008 | ||
58 | JaeWoong Chung, Michael Dalton, Hari Kannan, Christos Kozyrakis: Thread-safe dynamic binary translation using transactional memory. HPCA 2008: 279-289 | |
57 | Suzanne Rivoire, Parthasarathy Ranganathan, Christos Kozyrakis: A Comparison of High-Level Full-System Power Models. HotPower 2008 | |
56 | Chi Cao Minh, JaeWoong Chung, Christos Kozyrakis, Kunle Olukotun: STAMP: Stanford Transactional Applications for Multi-Processing. IISWC 2008: 35-46 | |
55 | Nickolai Zeldovich, Hari Kannan, Michael Dalton, Christos Kozyrakis: Hardware Enforcement of Application Security Policies Using Tagged Memory. OSDI 2008: 225-240 | |
54 | JaeWoong Chung, Jiwon Seo, Woongki Baek, Chi Cao Minh, Austen McDonald, Christos Kozyrakis, Kunle Olukotun: Improving software concurrency with hardware-assisted memory snapshot. SPAA 2008: 363 | |
53 | JaeWoong Chung, Woongki Baek, Nathan Grasso Bronson, Jiwon Seo, Christos Kozyrakis, Kunle Olukotun: Ased: availability, security, and debugging support usingtransactional memory. SPAA 2008: 366 | |
52 | Michael Dalton, Hari Kannan, Christos Kozyrakis: Real-World Buffer Overflow Protection for Userspace and Kernelspace. USENIX Security Symposium 2008: 395-410 | |
51 | James R. Larus, Christos Kozyrakis: Transactional memory. Commun. ACM 51(7): 80-88 (2008) | |
50 | Jacob Leverich, Hideho Arakida, Alex Solomatnikov, Amin Firoozshahian, Mark Horowitz, Christos Kozyrakis: Comparative evaluation of memory models for chip multiprocessors. TACO 5(3): (2008) | |
2007 | ||
49 | Ahmad Zmily, Christos Kozyrakis: A low power front-end for embedded processors using a block-aware instruction set. CASES 2007: 267-276 | |
48 | Njuguna Njoroge, Jared Casper, Sewook Wee, Yuriy Teslyar, Daxia Ge, Christos Kozyrakis, Kunle Olukotun: ATLAS: a chip-multiprocessor with transactional memory support. DATE 2007: 3-8 | |
47 | JongSoo Park, Sung-Boem Park, James D. Balfour, David Black-Schaffer, Christos Kozyrakis, William J. Dally: Register pointer architecture for efficient embedded processors. DATE 2007: 600-605 | |
46 | Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy Teslyar, Daxia Ge, Christos Kozyrakis, Kunle Olukotun: A practical FPGA-based framework for novel CMP research. FPGA 2007: 116-125 | |
45 | Colby Ranger, Ramanan Raghuraman, Arun Penmetsa, Gary R. Bradski, Christos Kozyrakis: Evaluating MapReduce for Multi-core and Multiprocessor Systems. HPCA 2007: 13-24 | |
44 | Hassan Chafi, Jared Casper, Brian D. Carlstrom, Austen McDonald, Chi Cao Minh, Woongki Baek, Christos Kozyrakis, Kunle Olukotun: A Scalable, Non-blocking Approach to Transactional Memory. HPCA 2007: 97-108 | |
43 | Jacob Leverich, Hideho Arakida, Alex Solomatnikov, Amin Firoozshahian, Mark Horowitz, Christos Kozyrakis: Comparing memory systems for chip multiprocessors. ISCA 2007: 358-368 | |
42 | Michael Dalton, Hari Kannan, Christos Kozyrakis: Raksha: a flexible information flow architecture for software security. ISCA 2007: 482-493 | |
41 | Chi Cao Minh, Martin Trautmann, JaeWoong Chung, Austen McDonald, Nathan Grasso Bronson, Jared Casper, Christos Kozyrakis, Kunle Olukotun: An effective hybrid transactional memory system with strong isolation guarantees. ISCA 2007: 69-80 | |
40 | Woongki Baek, Chi Cao Minh, Martin Trautmann, Christos Kozyrakis, Kunle Olukotun: The OpenTM Transactional Application Programming Interface. PACT 2007: 376-387 | |
39 | Ali-Reza Adl-Tabatabai, Christos Kozyrakis, Bratin Saha: Transactional programming in a multi-core environment. PPOPP 2007: 272 | |
38 | Ali-Reza Adl-Tabatabai, David Dice, Maurice Herlihy, Nir Shavit, Christos Kozyrakis, Christoph von Praun, Michael Scott: Potential show-stoppers for transactional synchronization. PPOPP 2007: 55 | |
37 | Brian D. Carlstrom, Austen McDonald, Michael Carbin, Christos Kozyrakis, Kunle Olukotun: Transactional collection classes. PPOPP 2007: 56-67 | |
36 | Suzanne Rivoire, Mehul A. Shah, Parthasarathy Ranganathan, Christos Kozyrakis: JouleSort: a balanced energy-efficiency benchmark. SIGMOD Conference 2007: 365-376 | |
35 | Woongki Baek, JaeWoong Chung, Chi Cao Minh, Christos Kozyrakis, Kunle Olukotun: Towards soft optimization techniques for parallel cognitive applications. SPAA 2007: 59-60 | |
34 | Suzanne Rivoire, Mehul A. Shah, Parthasarathy Ranganathan, Christos Kozyrakis, Justin Meza: Models and Metrics to Enable Energy-Efficiency Optimizations. IEEE Computer 40(12): 39-48 (2007) | |
33 | Austen McDonald, Brian D. Carlstrom, JaeWoong Chung, Chi Cao Minh, Hassan Chafi, Christos Kozyrakis, Kunle Olukotun: Transactional Memory: The Hardware-Software Interface. IEEE Micro 27(1): 67-76 (2007) | |
32 | John Wawrzynek, David A. Patterson, Mark Oskin, Shih-Lien Lu, Christoforos E. Kozyrakis, James C. Hoe, Derek Chiou, Krste Asanovic: RAMP: Research Accelerator for Multiple Processors. IEEE Micro 27(2): 46-57 (2007) | |
2006 | ||
31 | JaeWoong Chung, Chi Cao Minh, Austen McDonald, Travis Skare, Hassan Chafi, Brian D. Carlstrom, Christos Kozyrakis, Kunle Olukotun: Tradeoffs in transactional memory virtualization. ASPLOS 2006: 371-381 | |
30 | Ahmad Zmily, Christos Kozyrakis: Simultaneously improving code size, performance, and energy in embedded processors. DATE 2006: 224-229 | |
29 | JaeWoong Chung, Hassan Chafi, Chi Cao Minh, Austen McDonald, Brian D. Carlstrom, Christos Kozyrakis, Kunle Olukotun: The common case transactional behavior of multithreaded programs. HPCA 2006: 266-277 | |
28 | Suzanne Rivoire, Rebecca Schultz, Tomofumi Okuda, Christos Kozyrakis: Vector Lane Threading. ICPP 2006: 55-64 | |
27 | Austen McDonald, JaeWoong Chung, Brian D. Carlstrom, Chi Cao Minh, Hassan Chafi, Christos Kozyrakis, Kunle Olukotun: Architectural Semantics for Practical Transactional Memory. ISCA 2006: 53-65 | |
26 | Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi, Austen McDonald, Christos Kozyrakis, Kunle Olukotun: Testing implementations of transactional memory. PACT 2006: 134-143 | |
25 | Brian D. Carlstrom, Austen McDonald, Hassan Chafi, JaeWoong Chung, Chi Cao Minh, Christoforos E. Kozyrakis, Kunle Olukotun: The Atomos transactional programming language. PLDI 2006: 1-13 | |
24 | Ali-Reza Adl-Tabatabai, Christos Kozyrakis, Bratin Saha: Unlocking concurrency. ACM Queue 4(10): 24-33 (2006) | |
23 | Brian D. Carlstrom, JaeWoong Chung, Hassan Chafi, Austen McDonald, Chi Cao Minh, Lance Hammond, Christoforos E. Kozyrakis, Kunle Olukotun: Executing Java programs with transactional memory. Sci. Comput. Program. 63(2): 111-129 (2006) | |
22 | Ahmad Zmily, Christos Kozyrakis: Block-aware instruction set architecture. TACO 3(3): 327-357 (2006) | |
2005 | ||
21 | Ahmad Zmily, Earl Killian, Christos Kozyrakis: Improving Instruction Delivery with a Block-Aware ISA. Euro-Par 2005: 530-539 | |
20 | John Whaley, Christos Kozyrakis: Heuristics for Profile-Driven Method-Level Speculative Parallelization. ICPP 2005: 147-156 | |
19 | Hassan Chafi, Chi Cao Minh, Austen McDonald, Brian D. Carlstrom, JaeWoong Chung, Lance Hammond, Christos Kozyrakis, Kunle Olukotun: TAPE: a transactional application profiling environment. ICS 2005: 199-208 | |
18 | Austen McDonald, JaeWoong Chung, Hassan Chafi, Chi Cao Minh, Brian D. Carlstrom, Lance Hammond, Christos Kozyrakis, Kunle Olukotun: Characterization of TCC on Chip-Multiprocessors. IEEE PACT 2005: 63-74 | |
17 | Ahmad Zmily, Christos Kozyrakis: Energy-efficient and high-performance instruction fetch using a block-aware ISA. ISLPED 2005: 36-41 | |
2004 | ||
16 | Lance Hammond, Brian D. Carlstrom, Vicky Wong, Ben Hertzberg, Michael K. Chen, Christos Kozyrakis, Kunle Olukotun: Programming with transactional coherence and consistency (TCC). ASPLOS 2004: 1-13 | |
15 | Francois Labonte, Peter R. Mattson, William Thies, Ian Buck, Christos Kozyrakis, Mark Horowitz: The Stream Virtual Machine. IEEE PACT 2004: 267-277 | |
14 | Lance Hammond, Vicky Wong, Michael K. Chen, Brian D. Carlstrom, John D. Davis, Ben Hertzberg, Manohar K. Prabhu, Honggo Wijaya, Christos Kozyrakis, Kunle Olukotun: Transactional Memory Coherence and Consistency. ISCA 2004: 102-113 | |
13 | Lance Hammond, Brian D. Carlstrom, Vicky Wong, Michael K. Chen, Christos Kozyrakis, Kunle Olukotun: Transactional Coherence and Consistency: Simplifying Parallel Hardware and Software. IEEE Micro 24(6): 92-103 (2004) | |
2003 | ||
12 | Christoforos E. Kozyrakis, David A. Patterson: Overcoming the Limitations of Conventional Vector Processors. ISCA 2003: 399-409 | |
11 | Christoforos E. Kozyrakis, David A. Patterson: Scalable Vector Processors for Embedded Systems. IEEE Micro 23(6): 36-45 (2003) | |
2002 | ||
10 | Christoforos E. Kozyrakis, David A. Patterson: Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks. MICRO 2002: 283-293 | |
2001 | ||
9 | Frederic T. Chong, Christoforos E. Kozyrakis, Mark Oskin: Intelligent Memory Systems, Second International Workshop, IMS 2000, Cambridge, MA, USA, November 12, 2000, Revised Papers Springer 2001 | |
2000 | ||
8 | Francky Catthoor, Nikil D. Dutt, Christoforos E. Kozyrakis: How to Solve the Current Memory Access and Data Transfer Bottlenecks: At the Processor Architecture or at the Compiler Level? DATE 2000: 426- | |
7 | David Judd, Katherine A. Yelick, Christoforos E. Kozyrakis, David Martin, David A. Patterson: Exploiting On-Chip Memory Bandwidth in the VIRAM Compiler. Intelligent Memory Systems 2000: 122-134 | |
1998 | ||
6 | Soren Hein, Vijay Nagasamy, Bernhard Rohfleisch, Christoforos E. Kozyrakis, Nikil D. Dutt, Francky Catthoor: Embedded memories in system design - from technology to systems architecture. ICCAD 1998: 1 | |
5 | Christoforos E. Kozyrakis, David A. Patterson: A New Direction for Computer Architecture Research. IEEE Computer 31(11): 24-32 (1998) | |
1997 | ||
4 | George Kornaros, Christoforos E. Kozyrakis, Panagiota Vatsolaki, Manolis Katevenis: Pipelined Multi-Queue Management in a VLSI ATM Switch Chip with Credit-Based Flow-Control. ARVLSI 1997: 127-144 | |
3 | David A. Patterson, Krste Asanovic, Aaron B. Brown, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Christoforos E. Kozyrakis, David Martin, Stylianos Perissakis, Randi Thomas, Noah Treuhaft, Katherine A. Yelick: Intelligent RAM (IRAM): The Industrial Setting, Applications and Architectures. ICCD 1997: 2-7 | |
2 | Richard Fromm, Stylianos Perissakis, Neal Cardwell, Christoforos E. Kozyrakis, Bruce McGaughy, David A. Patterson, Thomas E. Anderson, Katherine A. Yelick: The Energy Efficiency of IRAM Architectures. ISCA 1997: 327-337 | |
1 | Christoforos E. Kozyrakis, Stylianos Perissakis, David A. Patterson, Thomas E. Anderson, Krste Asanovic, Neal Cardwell, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Randi Thomas, Noah Treuhaft, Katherine A. Yelick: Scalable Processors in the Billion-Transistor Era: IRAM. IEEE Computer 30(9): 75-78 (1997) |